7d2be0749a
This is a driver for the MMC controller on the AP7000 chips from Atmel. It should in theory work on AT91 systems too with some tweaking, but since the DMA interface is quite different, it's not entirely clear if it's worth merging this with the at91_mci driver. This driver has been around for a while in BSPs and kernel sources provided by Atmel, but this particular version uses the generic DMA Engine framework (with the slave extensions) instead of an avr32-only DMA controller framework. This driver can also use PIO transfers when no DMA channels are available, and for transfers where using DMA may be difficult or impractical for some reason (e.g. the DMA setup overhead is usually not worth it for very short transfers, and badly aligned buffers or lengths are difficult to handle.) Currently, the driver only support PIO transfers. DMA support has been split out to a separate patch to hopefully make it easier to review. The driver has been tested using mmc-block and ext3fs on several SD, SDHC and MMC+ cards. Reads and writes work fine, with read transfer rates up to 3.5 MiB/s on fast cards with debugging disabled. The driver has also been tested using the mmc_test module on the same cards. All tests except 7, 9, 15 and 17 succeed. The first two are unsupported by all the cards I have, so I don't know if the driver handles this correctly. The last two fail because the hardware flags a Data CRC Error instead of a Data Timeout error. I'm not sure how to deal with that. Documentation for this controller can be found in many data sheets from Atmel, including the AT32AP7000 data sheet which can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
257 lines
6.4 KiB
C
257 lines
6.4 KiB
C
/*
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* ATSTK1002 daughterboard-specific init code
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*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/etherdevice.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/at73c213.h>
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#include <video/atmel_lcdc.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/arch/at32ap700x.h>
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#include <asm/arch/board.h>
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#include <asm/arch/init.h>
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#include <asm/arch/portmux.h>
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#include "atstk1000.h"
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/* Oscillator frequencies. These are board specific */
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unsigned long at32_board_osc_rates[3] = {
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[0] = 32768, /* 32.768 kHz on RTC osc */
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[1] = 20000000, /* 20 MHz on osc0 */
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[2] = 12000000, /* 12 MHz on osc1 */
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};
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struct eth_addr {
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u8 addr[6];
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};
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static struct eth_addr __initdata hw_addr[2];
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static struct eth_platform_data __initdata eth_data[2] = {
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{
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/*
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* The MDIO pullups on STK1000 are a bit too weak for
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* the autodetection to work properly, so we have to
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* mask out everything but the correct address.
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*/
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.phy_mask = ~(1U << 16),
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},
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{
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.phy_mask = ~(1U << 17),
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},
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};
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#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
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static struct at73c213_board_info at73c213_data = {
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.ssc_id = 0,
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.shortname = "AVR32 STK1000 external DAC",
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};
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#endif
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#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
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static struct spi_board_info spi0_board_info[] __initdata = {
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#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
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{
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/* AT73C213 */
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.modalias = "at73c213",
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.max_speed_hz = 200000,
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.chip_select = 0,
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.mode = SPI_MODE_1,
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.platform_data = &at73c213_data,
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},
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#endif
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{
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/* QVGA display */
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.modalias = "ltv350qv",
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.max_speed_hz = 16000000,
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.chip_select = 1,
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.mode = SPI_MODE_3,
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},
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};
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#endif
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#ifdef CONFIG_BOARD_ATSTK100X_SPI1
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static struct spi_board_info spi1_board_info[] __initdata = { {
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/* patch in custom entries here */
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} };
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#endif
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/*
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* The next two functions should go away as the boot loader is
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* supposed to initialize the macb address registers with a valid
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* ethernet address. But we need to keep it around for a while until
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* we can be reasonably sure the boot loader does this.
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*
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* The phy_id is ignored as the driver will probe for it.
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*/
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static int __init parse_tag_ethernet(struct tag *tag)
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{
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int i;
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i = tag->u.ethernet.mac_index;
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if (i < ARRAY_SIZE(hw_addr))
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memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
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sizeof(hw_addr[i].addr));
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return 0;
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}
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__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
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static void __init set_hw_addr(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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const u8 *addr;
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void __iomem *regs;
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struct clk *pclk;
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if (!res)
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return;
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if (pdev->id >= ARRAY_SIZE(hw_addr))
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return;
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addr = hw_addr[pdev->id].addr;
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if (!is_valid_ether_addr(addr))
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return;
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/*
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* Since this is board-specific code, we'll cheat and use the
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* physical address directly as we happen to know that it's
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* the same as the virtual address.
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*/
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regs = (void __iomem __force *)res->start;
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pclk = clk_get(&pdev->dev, "pclk");
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if (!pclk)
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return;
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clk_enable(pclk);
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__raw_writel((addr[3] << 24) | (addr[2] << 16)
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| (addr[1] << 8) | addr[0], regs + 0x98);
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__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
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clk_disable(pclk);
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clk_put(pclk);
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}
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#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
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static void __init atstk1002_setup_extdac(void)
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{
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struct clk *gclk;
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struct clk *pll;
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gclk = clk_get(NULL, "gclk0");
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if (IS_ERR(gclk))
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goto err_gclk;
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pll = clk_get(NULL, "pll0");
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if (IS_ERR(pll))
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goto err_pll;
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if (clk_set_parent(gclk, pll)) {
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pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
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goto err_set_clk;
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}
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at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
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at73c213_data.dac_clk = gclk;
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err_set_clk:
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clk_put(pll);
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err_pll:
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clk_put(gclk);
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err_gclk:
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return;
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}
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#else
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static void __init atstk1002_setup_extdac(void)
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{
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}
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#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
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void __init setup_board(void)
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{
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#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
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at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
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#else
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at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
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#endif
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/* USART 2/unused: expansion connector */
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at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
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at32_setup_serial_console(0);
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}
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static int __init atstk1002_init(void)
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{
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/*
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* ATSTK1000 uses 32-bit SDRAM interface. Reserve the
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* SDRAM-specific pins so that nobody messes with them.
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*/
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at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
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at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
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at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
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at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
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at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
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at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
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at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
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at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
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at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
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at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
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at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
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at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
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at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
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at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
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at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
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at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
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at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
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at32_add_system_devices();
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#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
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at32_add_device_usart(1);
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#else
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at32_add_device_usart(0);
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#endif
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at32_add_device_usart(2);
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#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
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set_hw_addr(at32_add_device_eth(0, ð_data[0]));
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#endif
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#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
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at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
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#endif
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#ifdef CONFIG_BOARD_ATSTK100X_SPI1
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at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
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#endif
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#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
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at32_add_device_mci(0, NULL);
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#endif
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#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
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set_hw_addr(at32_add_device_eth(1, ð_data[1]));
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#else
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at32_add_device_lcdc(0, &atstk1000_lcdc_data,
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fbmem_start, fbmem_size, 0);
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#endif
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at32_add_device_usba(0, NULL);
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#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
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at32_add_device_ssc(0, ATMEL_SSC_TX);
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#endif
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atstk1000_setup_j2_leds();
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atstk1002_setup_extdac();
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return 0;
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}
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postcore_initcall(atstk1002_init);
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