88ba2aa586
In support of inter-channel chaining async_tx utilizes an ack flag to gate whether a dependent operation can be chained to another. While the flag is not set the chain can be considered open for appending. Setting the ack flag closes the chain and flags the descriptor for garbage collection. The ASYNC_TX_DEP_ACK flag essentially means "close the chain after adding this dependency". Since each operation can only have one child the api now implicitly sets the ack flag at dependency submission time. This removes an unnecessary management burden from clients of the api. [ Impact: clean up and enforce one dependency per operation ] Reviewed-by: Andre Noll <maan@systemlinux.org> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
304 lines
7.8 KiB
C
304 lines
7.8 KiB
C
/*
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* core routines for the asynchronous memory transfer/transform api
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*
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* Copyright © 2006, Intel Corporation.
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*
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* Dan Williams <dan.j.williams@intel.com>
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*
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* with architecture considerations by:
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* Neil Brown <neilb@suse.de>
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* Jeff Garzik <jeff@garzik.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <linux/rculist.h>
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#include <linux/kernel.h>
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#include <linux/async_tx.h>
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#ifdef CONFIG_DMA_ENGINE
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static int __init async_tx_init(void)
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{
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async_dmaengine_get();
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printk(KERN_INFO "async_tx: api initialized (async)\n");
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return 0;
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}
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static void __exit async_tx_exit(void)
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{
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async_dmaengine_put();
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}
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/**
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* __async_tx_find_channel - find a channel to carry out the operation or let
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* the transaction execute synchronously
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* @depend_tx: transaction dependency
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* @tx_type: transaction type
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*/
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struct dma_chan *
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__async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx,
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enum dma_transaction_type tx_type)
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{
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/* see if we can keep the chain on one channel */
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if (depend_tx &&
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dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
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return depend_tx->chan;
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return async_dma_find_channel(tx_type);
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}
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EXPORT_SYMBOL_GPL(__async_tx_find_channel);
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#else
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static int __init async_tx_init(void)
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{
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printk(KERN_INFO "async_tx: api initialized (sync-only)\n");
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return 0;
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}
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static void __exit async_tx_exit(void)
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{
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do { } while (0);
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}
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#endif
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/**
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* async_tx_channel_switch - queue an interrupt descriptor with a dependency
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* pre-attached.
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* @depend_tx: the operation that must finish before the new operation runs
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* @tx: the new operation
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*/
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static void
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async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
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struct dma_async_tx_descriptor *tx)
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{
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struct dma_chan *chan;
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struct dma_device *device;
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struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
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/* first check to see if we can still append to depend_tx */
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spin_lock_bh(&depend_tx->lock);
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if (depend_tx->parent && depend_tx->chan == tx->chan) {
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tx->parent = depend_tx;
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depend_tx->next = tx;
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intr_tx = NULL;
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}
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spin_unlock_bh(&depend_tx->lock);
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if (!intr_tx)
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return;
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chan = depend_tx->chan;
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device = chan->device;
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/* see if we can schedule an interrupt
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* otherwise poll for completion
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*/
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if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
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intr_tx = device->device_prep_dma_interrupt(chan, 0);
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else
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intr_tx = NULL;
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if (intr_tx) {
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intr_tx->callback = NULL;
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intr_tx->callback_param = NULL;
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tx->parent = intr_tx;
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/* safe to set ->next outside the lock since we know we are
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* not submitted yet
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*/
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intr_tx->next = tx;
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/* check if we need to append */
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spin_lock_bh(&depend_tx->lock);
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if (depend_tx->parent) {
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intr_tx->parent = depend_tx;
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depend_tx->next = intr_tx;
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async_tx_ack(intr_tx);
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intr_tx = NULL;
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}
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spin_unlock_bh(&depend_tx->lock);
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if (intr_tx) {
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intr_tx->parent = NULL;
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intr_tx->tx_submit(intr_tx);
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async_tx_ack(intr_tx);
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}
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} else {
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if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
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panic("%s: DMA_ERROR waiting for depend_tx\n",
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__func__);
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tx->tx_submit(tx);
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}
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}
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/**
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* submit_disposition - while holding depend_tx->lock we must avoid submitting
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* new operations to prevent a circular locking dependency with
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* drivers that already hold a channel lock when calling
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* async_tx_run_dependencies.
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* @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
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* @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
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* @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
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*/
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enum submit_disposition {
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ASYNC_TX_SUBMITTED,
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ASYNC_TX_CHANNEL_SWITCH,
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ASYNC_TX_DIRECT_SUBMIT,
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};
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void
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async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
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enum async_tx_flags flags, struct dma_async_tx_descriptor *depend_tx,
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dma_async_tx_callback cb_fn, void *cb_param)
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{
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tx->callback = cb_fn;
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tx->callback_param = cb_param;
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if (depend_tx) {
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enum submit_disposition s;
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/* sanity check the dependency chain:
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* 1/ if ack is already set then we cannot be sure
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* we are referring to the correct operation
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* 2/ dependencies are 1:1 i.e. two transactions can
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* not depend on the same parent
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*/
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BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next ||
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tx->parent);
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/* the lock prevents async_tx_run_dependencies from missing
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* the setting of ->next when ->parent != NULL
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*/
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spin_lock_bh(&depend_tx->lock);
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if (depend_tx->parent) {
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/* we have a parent so we can not submit directly
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* if we are staying on the same channel: append
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* else: channel switch
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*/
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if (depend_tx->chan == chan) {
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tx->parent = depend_tx;
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depend_tx->next = tx;
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s = ASYNC_TX_SUBMITTED;
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} else
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s = ASYNC_TX_CHANNEL_SWITCH;
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} else {
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/* we do not have a parent so we may be able to submit
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* directly if we are staying on the same channel
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*/
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if (depend_tx->chan == chan)
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s = ASYNC_TX_DIRECT_SUBMIT;
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else
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s = ASYNC_TX_CHANNEL_SWITCH;
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}
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spin_unlock_bh(&depend_tx->lock);
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switch (s) {
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case ASYNC_TX_SUBMITTED:
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break;
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case ASYNC_TX_CHANNEL_SWITCH:
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async_tx_channel_switch(depend_tx, tx);
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break;
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case ASYNC_TX_DIRECT_SUBMIT:
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tx->parent = NULL;
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tx->tx_submit(tx);
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break;
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}
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} else {
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tx->parent = NULL;
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tx->tx_submit(tx);
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}
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if (flags & ASYNC_TX_ACK)
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async_tx_ack(tx);
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if (depend_tx)
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async_tx_ack(depend_tx);
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}
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EXPORT_SYMBOL_GPL(async_tx_submit);
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/**
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* async_trigger_callback - schedules the callback function to be run after
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* any dependent operations have been completed.
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* @flags: ASYNC_TX_ACK
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* @depend_tx: 'callback' requires the completion of this transaction
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* @cb_fn: function to call after depend_tx completes
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* @cb_param: parameter to pass to the callback routine
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*/
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struct dma_async_tx_descriptor *
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async_trigger_callback(enum async_tx_flags flags,
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struct dma_async_tx_descriptor *depend_tx,
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dma_async_tx_callback cb_fn, void *cb_param)
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{
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struct dma_chan *chan;
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struct dma_device *device;
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struct dma_async_tx_descriptor *tx;
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if (depend_tx) {
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chan = depend_tx->chan;
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device = chan->device;
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/* see if we can schedule an interrupt
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* otherwise poll for completion
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*/
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if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
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device = NULL;
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tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
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} else
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tx = NULL;
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if (tx) {
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pr_debug("%s: (async)\n", __func__);
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async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
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} else {
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pr_debug("%s: (sync)\n", __func__);
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/* wait for any prerequisite operations */
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async_tx_quiesce(&depend_tx);
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async_tx_sync_epilog(cb_fn, cb_param);
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}
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return tx;
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}
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EXPORT_SYMBOL_GPL(async_trigger_callback);
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/**
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* async_tx_quiesce - ensure tx is complete and freeable upon return
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* @tx - transaction to quiesce
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*/
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void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
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{
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if (*tx) {
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/* if ack is already set then we cannot be sure
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* we are referring to the correct operation
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*/
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BUG_ON(async_tx_test_ack(*tx));
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if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
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panic("DMA_ERROR waiting for transaction\n");
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async_tx_ack(*tx);
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*tx = NULL;
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}
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}
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EXPORT_SYMBOL_GPL(async_tx_quiesce);
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module_init(async_tx_init);
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module_exit(async_tx_exit);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
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MODULE_LICENSE("GPL");
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