b6f837575e
This patch adds clock support for S5P6442. This patch adds the clock register definitions and the various system clocks in S5P6442. Signed-off-by: Adityapratap Sharma <aditya.ps@samsung.com> Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
70 lines
1.8 KiB
C
70 lines
1.8 KiB
C
/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
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*
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* Copyright 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
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*
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* S5P6442 - pwm clock and timer support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_PWMCLK_H
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#define __ASM_ARCH_PWMCLK_H __FILE__
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/**
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* pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
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* @cfg: The timer TCFG1 register bits shifted down to 0.
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*
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* Return true if the given configuration from TCFG1 is a TCLK instead
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* any of the TDIV clocks.
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*/
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static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
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{
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return tcfg == S3C2410_TCFG1_MUX_TCLK;
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}
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/**
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* tcfg_to_divisor() - convert tcfg1 setting to a divisor
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* @tcfg1: The tcfg1 setting, shifted down.
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*
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* Get the divisor value for the given tcfg1 setting. We assume the
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* caller has already checked to see if this is not a TCLK source.
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*/
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static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
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{
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return 1 << (1 + tcfg1);
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}
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/**
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* pwm_tdiv_has_div1() - does the tdiv setting have a /1
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*
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* Return true if we have a /1 in the tdiv setting.
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*/
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static inline unsigned int pwm_tdiv_has_div1(void)
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{
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return 0;
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}
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/**
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* pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
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* @div: The divisor to calculate the bit information for.
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*
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* Turn a divisor into the necessary bit field for TCFG1.
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*/
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static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
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{
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return ilog2(div) - 1;
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}
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#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
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#endif /* __ASM_ARCH_PWMCLK_H */
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