af73110d23
On MP systems, the data loaded by CPU0 before the SCU was initialised may not be visible to the other CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> This also includes the following compile fix: This patch includes 'asm/cacheflush.h' which is needed to use 'flush_cache_all()' function. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
49 lines
1.1 KiB
C
49 lines
1.1 KiB
C
/*
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* linux/arch/arm/kernel/smp_scu.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/smp_scu.h>
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#include <asm/cacheflush.h>
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#define SCU_CTRL 0x00
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#define SCU_CONFIG 0x04
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#define SCU_CPU_STATUS 0x08
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#define SCU_INVALIDATE 0x0c
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#define SCU_FPGA_REVISION 0x10
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/*
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* Get the number of CPU cores from the SCU configuration
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*/
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unsigned int __init scu_get_core_count(void __iomem *scu_base)
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{
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unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG);
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return (ncores & 0x03) + 1;
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}
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/*
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* Enable the SCU
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*/
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void __init scu_enable(void __iomem *scu_base)
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{
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u32 scu_ctrl;
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scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
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scu_ctrl |= 1;
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__raw_writel(scu_ctrl, scu_base + SCU_CTRL);
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/*
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* Ensure that the data accessed by CPU0 before the SCU was
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* initialised is visible to the other CPUs.
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*/
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flush_cache_all();
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}
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