1abd918499
This patch mostly follows commit 5998102b90
"ASoC: Refactor WM8731 device registration" to make UDA1380 use standard
device instantiation. Similarly, the I2C device registration temporarily
moves into the magician machine driver before it will find its final
resting place in the board file.
At the same time, platform specific configuration is moved to platform data
and common power/reset GPIO handling moves into the codec driver.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
83 lines
2.2 KiB
C
83 lines
2.2 KiB
C
/*
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* Audio support for Philips UDA1380
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
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*/
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#ifndef _UDA1380_H
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#define _UDA1380_H
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#define UDA1380_CLK 0x00
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#define UDA1380_IFACE 0x01
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#define UDA1380_PM 0x02
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#define UDA1380_AMIX 0x03
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#define UDA1380_HP 0x04
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#define UDA1380_MVOL 0x10
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#define UDA1380_MIXVOL 0x11
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#define UDA1380_MODE 0x12
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#define UDA1380_DEEMP 0x13
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#define UDA1380_MIXER 0x14
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#define UDA1380_INTSTAT 0x18
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#define UDA1380_DEC 0x20
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#define UDA1380_PGA 0x21
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#define UDA1380_ADC 0x22
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#define UDA1380_AGC 0x23
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#define UDA1380_DECSTAT 0x28
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#define UDA1380_RESET 0x7f
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#define UDA1380_CACHEREGNUM 0x24
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/* Register flags */
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#define R00_EN_ADC 0x0800
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#define R00_EN_DEC 0x0400
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#define R00_EN_DAC 0x0200
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#define R00_EN_INT 0x0100
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#define R00_DAC_CLK 0x0010
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#define R01_SFORI_I2S 0x0000
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#define R01_SFORI_LSB16 0x0100
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#define R01_SFORI_LSB18 0x0200
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#define R01_SFORI_LSB20 0x0300
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#define R01_SFORI_MSB 0x0500
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#define R01_SFORI_MASK 0x0700
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#define R01_SFORO_I2S 0x0000
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#define R01_SFORO_LSB16 0x0001
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#define R01_SFORO_LSB18 0x0002
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#define R01_SFORO_LSB20 0x0003
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#define R01_SFORO_LSB24 0x0004
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#define R01_SFORO_MSB 0x0005
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#define R01_SFORO_MASK 0x0007
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#define R01_SEL_SOURCE 0x0040
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#define R01_SIM 0x0010
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#define R02_PON_PLL 0x8000
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#define R02_PON_HP 0x2000
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#define R02_PON_DAC 0x0400
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#define R02_PON_BIAS 0x0100
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#define R02_EN_AVC 0x0080
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#define R02_PON_AVC 0x0040
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#define R02_PON_LNA 0x0010
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#define R02_PON_PGAL 0x0008
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#define R02_PON_ADCL 0x0004
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#define R02_PON_PGAR 0x0002
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#define R02_PON_ADCR 0x0001
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#define R13_MTM 0x4000
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#define R14_SILENCE 0x0080
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#define R14_SDET_ON 0x0040
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#define R21_MT_ADC 0x8000
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#define R22_SEL_LNA 0x0008
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#define R22_SEL_MIC 0x0004
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#define R22_SKIP_DCFIL 0x0002
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#define R23_AGC_EN 0x0001
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#define UDA1380_DAI_DUPLEX 0 /* playback and capture on single DAI */
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#define UDA1380_DAI_PLAYBACK 1 /* playback DAI */
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#define UDA1380_DAI_CAPTURE 2 /* capture DAI */
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extern struct snd_soc_dai uda1380_dai[3];
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extern struct snd_soc_codec_device soc_codec_dev_uda1380;
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#endif /* _UDA1380_H */
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