8c25c36f33
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
45 lines
1.6 KiB
C
45 lines
1.6 KiB
C
#ifndef __MACH_MX25_H__
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#define __MACH_MX25_H__
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#define MX25_AIPS1_BASE_ADDR 0x43F00000
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#define MX25_AIPS1_BASE_ADDR_VIRT 0xFC000000
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#define MX25_AIPS1_SIZE SZ_1M
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#define MX25_AIPS2_BASE_ADDR 0x53F00000
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#define MX25_AIPS2_BASE_ADDR_VIRT 0xFC200000
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#define MX25_AIPS2_SIZE SZ_1M
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#define MX25_AVIC_BASE_ADDR 0x68000000
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#define MX25_AVIC_BASE_ADDR_VIRT 0xFC400000
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#define MX25_AVIC_SIZE SZ_1M
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#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
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#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
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#define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000)
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#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
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#define MX25_GPIO1_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
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#define MX25_GPIO2_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
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#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
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#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
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#define MX25_AIPS1_IO_ADDRESS(x) \
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(((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
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#define MX25_AIPS2_IO_ADDRESS(x) \
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(((x) - MX25_AIPS2_BASE_ADDR) + MX25_AIPS2_BASE_ADDR_VIRT)
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#define MX25_AVIC_IO_ADDRESS(x) \
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(((x) - MX25_AVIC_BASE_ADDR) + MX25_AVIC_BASE_ADDR_VIRT)
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#define __in_range(addr, name) ((addr) >= name##_BASE_ADDR && (addr) < name##_BASE_ADDR + name##_SIZE)
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#define MX25_IO_ADDRESS(x) \
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(void __force __iomem *) \
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(__in_range(x, MX25_AIPS1) ? MX25_AIPS1_IO_ADDRESS(x) : \
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__in_range(x, MX25_AIPS2) ? MX25_AIPS2_IO_ADDRESS(x) : \
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__in_range(x, MX25_AVIC) ? MX25_AVIC_IO_ADDRESS(x) : \
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0xDEADBEEF)
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#define UART1_BASE_ADDR 0x43f90000
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#define UART2_BASE_ADDR 0x43f94000
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#endif /* __MACH_MX25_H__ */
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