4360bb4192
Feroceon L2 cache can work in eighther write through or write back mode on Kirkwood. Add the option to configure this mode according to Kconfig. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
617 lines
15 KiB
C
617 lines
15 KiB
C
/*
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* arch/arm/mach-kirkwood/common.c
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*
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* Core functions for Marvell Kirkwood SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/mbus.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/ata_platform.h>
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#include <linux/spi/orion_spi.h>
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#include <asm/page.h>
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#include <asm/timex.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/kirkwood.h>
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#include <plat/cache-feroceon-l2.h>
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#include <plat/ehci-orion.h>
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#include <plat/mv_xor.h>
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#include <plat/orion_nand.h>
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#include <plat/time.h>
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#include "common.h"
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/*****************************************************************************
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* I/O Address Mapping
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****************************************************************************/
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static struct map_desc kirkwood_io_desc[] __initdata = {
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{
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.virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
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.length = KIRKWOOD_PCIE_IO_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = KIRKWOOD_REGS_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
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.length = KIRKWOOD_REGS_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init kirkwood_map_io(void)
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{
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iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
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}
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/*****************************************************************************
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* EHCI
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****************************************************************************/
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static struct orion_ehci_data kirkwood_ehci_data = {
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.dram = &kirkwood_mbus_dram_info,
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};
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static u64 ehci_dmamask = 0xffffffffUL;
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/*****************************************************************************
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* EHCI0
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****************************************************************************/
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static struct resource kirkwood_ehci_resources[] = {
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{
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.start = USB_PHYS_BASE,
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.end = USB_PHYS_BASE + 0x0fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_USB,
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.end = IRQ_KIRKWOOD_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_ehci = {
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.name = "orion-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &ehci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &kirkwood_ehci_data,
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},
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.resource = kirkwood_ehci_resources,
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.num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
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};
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void __init kirkwood_ehci_init(void)
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{
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platform_device_register(&kirkwood_ehci);
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}
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/*****************************************************************************
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* GE00
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****************************************************************************/
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struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
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.dram = &kirkwood_mbus_dram_info,
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};
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static struct resource kirkwood_ge00_shared_resources[] = {
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{
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.name = "ge00 base",
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.start = GE00_PHYS_BASE + 0x2000,
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.end = GE00_PHYS_BASE + 0x3fff,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "ge00 err irq",
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.start = IRQ_KIRKWOOD_GE00_ERR,
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.end = IRQ_KIRKWOOD_GE00_ERR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_ge00_shared = {
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.name = MV643XX_ETH_SHARED_NAME,
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.id = 0,
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.dev = {
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.platform_data = &kirkwood_ge00_shared_data,
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},
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.num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
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.resource = kirkwood_ge00_shared_resources,
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};
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static struct resource kirkwood_ge00_resources[] = {
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{
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.name = "ge00 irq",
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.start = IRQ_KIRKWOOD_GE00_SUM,
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.end = IRQ_KIRKWOOD_GE00_SUM,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_ge00 = {
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.name = MV643XX_ETH_NAME,
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.id = 0,
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.num_resources = 1,
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.resource = kirkwood_ge00_resources,
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};
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void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
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{
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eth_data->shared = &kirkwood_ge00_shared;
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kirkwood_ge00.dev.platform_data = eth_data;
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platform_device_register(&kirkwood_ge00_shared);
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platform_device_register(&kirkwood_ge00);
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}
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/*****************************************************************************
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* SoC RTC
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****************************************************************************/
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static struct resource kirkwood_rtc_resource = {
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.start = RTC_PHYS_BASE,
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.end = RTC_PHYS_BASE + SZ_16 - 1,
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.flags = IORESOURCE_MEM,
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};
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void __init kirkwood_rtc_init(void)
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{
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platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
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}
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/*****************************************************************************
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* SATA
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****************************************************************************/
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static struct resource kirkwood_sata_resources[] = {
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{
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.name = "sata base",
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.start = SATA_PHYS_BASE,
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.end = SATA_PHYS_BASE + 0x5000 - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "sata irq",
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.start = IRQ_KIRKWOOD_SATA,
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.end = IRQ_KIRKWOOD_SATA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_sata = {
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.name = "sata_mv",
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.id = 0,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(kirkwood_sata_resources),
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.resource = kirkwood_sata_resources,
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};
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void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
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{
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sata_data->dram = &kirkwood_mbus_dram_info;
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kirkwood_sata.dev.platform_data = sata_data;
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platform_device_register(&kirkwood_sata);
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}
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/*****************************************************************************
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* SPI
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****************************************************************************/
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static struct orion_spi_info kirkwood_spi_plat_data = {
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};
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static struct resource kirkwood_spi_resources[] = {
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{
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.start = SPI_PHYS_BASE,
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.end = SPI_PHYS_BASE + SZ_512 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device kirkwood_spi = {
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.name = "orion_spi",
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.id = 0,
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.resource = kirkwood_spi_resources,
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.dev = {
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.platform_data = &kirkwood_spi_plat_data,
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},
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.num_resources = ARRAY_SIZE(kirkwood_spi_resources),
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};
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void __init kirkwood_spi_init()
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{
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platform_device_register(&kirkwood_spi);
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}
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/*****************************************************************************
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* UART0
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****************************************************************************/
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static struct plat_serial8250_port kirkwood_uart0_data[] = {
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{
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.mapbase = UART0_PHYS_BASE,
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.membase = (char *)UART0_VIRT_BASE,
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.irq = IRQ_KIRKWOOD_UART_0,
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = 0,
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}, {
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},
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};
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static struct resource kirkwood_uart0_resources[] = {
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{
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.start = UART0_PHYS_BASE,
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.end = UART0_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_UART_0,
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.end = IRQ_KIRKWOOD_UART_0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_uart0 = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = kirkwood_uart0_data,
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},
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.resource = kirkwood_uart0_resources,
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.num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
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};
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void __init kirkwood_uart0_init(void)
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{
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platform_device_register(&kirkwood_uart0);
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}
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/*****************************************************************************
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* UART1
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****************************************************************************/
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static struct plat_serial8250_port kirkwood_uart1_data[] = {
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{
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.mapbase = UART1_PHYS_BASE,
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.membase = (char *)UART1_VIRT_BASE,
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.irq = IRQ_KIRKWOOD_UART_1,
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = 0,
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}, {
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},
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};
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static struct resource kirkwood_uart1_resources[] = {
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{
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.start = UART1_PHYS_BASE,
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.end = UART1_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_UART_1,
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.end = IRQ_KIRKWOOD_UART_1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_uart1 = {
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.name = "serial8250",
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.id = 1,
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.dev = {
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.platform_data = kirkwood_uart1_data,
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},
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.resource = kirkwood_uart1_resources,
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.num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
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};
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void __init kirkwood_uart1_init(void)
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{
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platform_device_register(&kirkwood_uart1);
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}
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/*****************************************************************************
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* XOR
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****************************************************************************/
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static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
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.dram = &kirkwood_mbus_dram_info,
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};
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static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
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/*****************************************************************************
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* XOR0
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****************************************************************************/
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static struct resource kirkwood_xor0_shared_resources[] = {
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{
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.name = "xor 0 low",
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.start = XOR0_PHYS_BASE,
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.end = XOR0_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "xor 0 high",
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.start = XOR0_HIGH_PHYS_BASE,
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.end = XOR0_HIGH_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device kirkwood_xor0_shared = {
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.name = MV_XOR_SHARED_NAME,
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.id = 0,
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.dev = {
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.platform_data = &kirkwood_xor_shared_data,
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},
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.num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
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.resource = kirkwood_xor0_shared_resources,
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};
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static struct resource kirkwood_xor00_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_00,
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.end = IRQ_KIRKWOOD_XOR_00,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor00_data = {
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.shared = &kirkwood_xor0_shared,
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.hw_id = 0,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor00_channel = {
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.name = MV_XOR_NAME,
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.id = 0,
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.num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
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.resource = kirkwood_xor00_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor00_data,
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},
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};
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static struct resource kirkwood_xor01_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_01,
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.end = IRQ_KIRKWOOD_XOR_01,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor01_data = {
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.shared = &kirkwood_xor0_shared,
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.hw_id = 1,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor01_channel = {
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.name = MV_XOR_NAME,
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.id = 1,
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.num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
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.resource = kirkwood_xor01_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor01_data,
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},
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};
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void __init kirkwood_xor0_init(void)
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{
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platform_device_register(&kirkwood_xor0_shared);
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/*
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* two engines can't do memset simultaneously, this limitation
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* satisfied by removing memset support from one of the engines.
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*/
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dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
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dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
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platform_device_register(&kirkwood_xor00_channel);
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dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
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dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
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dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
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platform_device_register(&kirkwood_xor01_channel);
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}
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/*****************************************************************************
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* XOR1
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****************************************************************************/
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static struct resource kirkwood_xor1_shared_resources[] = {
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{
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.name = "xor 1 low",
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.start = XOR1_PHYS_BASE,
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.end = XOR1_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "xor 1 high",
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.start = XOR1_HIGH_PHYS_BASE,
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.end = XOR1_HIGH_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device kirkwood_xor1_shared = {
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.name = MV_XOR_SHARED_NAME,
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.id = 1,
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.dev = {
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.platform_data = &kirkwood_xor_shared_data,
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},
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.num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
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.resource = kirkwood_xor1_shared_resources,
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};
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static struct resource kirkwood_xor10_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_10,
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.end = IRQ_KIRKWOOD_XOR_10,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor10_data = {
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.shared = &kirkwood_xor1_shared,
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.hw_id = 0,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor10_channel = {
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.name = MV_XOR_NAME,
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.id = 2,
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.num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
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.resource = kirkwood_xor10_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor10_data,
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},
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};
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static struct resource kirkwood_xor11_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_11,
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.end = IRQ_KIRKWOOD_XOR_11,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor11_data = {
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.shared = &kirkwood_xor1_shared,
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.hw_id = 1,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor11_channel = {
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.name = MV_XOR_NAME,
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.id = 3,
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.num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
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.resource = kirkwood_xor11_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor11_data,
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},
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};
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void __init kirkwood_xor1_init(void)
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{
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|
platform_device_register(&kirkwood_xor1_shared);
|
|
|
|
/*
|
|
* two engines can't do memset simultaneously, this limitation
|
|
* satisfied by removing memset support from one of the engines.
|
|
*/
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
|
|
dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
|
|
platform_device_register(&kirkwood_xor10_channel);
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
|
|
dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
|
|
dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
|
|
platform_device_register(&kirkwood_xor11_channel);
|
|
}
|
|
|
|
|
|
/*****************************************************************************
|
|
* Time handling
|
|
****************************************************************************/
|
|
int kirkwood_tclk;
|
|
|
|
int __init kirkwood_find_tclk(void)
|
|
{
|
|
u32 dev, rev;
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
|
if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0)
|
|
return 200000000;
|
|
|
|
return 166666667;
|
|
}
|
|
|
|
static void kirkwood_timer_init(void)
|
|
{
|
|
kirkwood_tclk = kirkwood_find_tclk();
|
|
orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
|
|
}
|
|
|
|
struct sys_timer kirkwood_timer = {
|
|
.init = kirkwood_timer_init,
|
|
};
|
|
|
|
|
|
/*****************************************************************************
|
|
* General
|
|
****************************************************************************/
|
|
/*
|
|
* Identify device ID and revision.
|
|
*/
|
|
static char * __init kirkwood_id(void)
|
|
{
|
|
u32 dev, rev;
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
|
|
|
if (dev == MV88F6281_DEV_ID) {
|
|
if (rev == MV88F6281_REV_Z0)
|
|
return "MV88F6281-Z0";
|
|
else if (rev == MV88F6281_REV_A0)
|
|
return "MV88F6281-A0";
|
|
else
|
|
return "MV88F6281-Rev-Unsupported";
|
|
} else if (dev == MV88F6192_DEV_ID) {
|
|
if (rev == MV88F6192_REV_Z0)
|
|
return "MV88F6192-Z0";
|
|
else if (rev == MV88F6192_REV_A0)
|
|
return "MV88F6192-A0";
|
|
else
|
|
return "MV88F6192-Rev-Unsupported";
|
|
} else if (dev == MV88F6180_DEV_ID) {
|
|
if (rev == MV88F6180_REV_A0)
|
|
return "MV88F6180-Rev-A0";
|
|
else
|
|
return "MV88F6180-Rev-Unsupported";
|
|
} else {
|
|
return "Device-Unknown";
|
|
}
|
|
}
|
|
|
|
static void __init kirkwood_l2_init(void)
|
|
{
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
|
|
writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
feroceon_l2_init(1);
|
|
#else
|
|
writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
feroceon_l2_init(0);
|
|
#endif
|
|
}
|
|
|
|
void __init kirkwood_init(void)
|
|
{
|
|
printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
|
|
kirkwood_id(), kirkwood_tclk);
|
|
kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
|
|
kirkwood_spi_plat_data.tclk = kirkwood_tclk;
|
|
kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
|
|
kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
|
|
|
|
kirkwood_setup_cpu_mbus();
|
|
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2
|
|
kirkwood_l2_init();
|
|
#endif
|
|
}
|