98a79d6a50
Impact: cleanup Each SMP arch defines these themselves. Move them to a central location. Twists: 1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a CONFIG_INIT_ALL_POSSIBLE for this rather than break them. 2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'. Those archs simply have phys_cpu_present_map replaced everywhere. 3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky so I just manipulate them both in sync. 4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map' declarations. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Tested-by: Tony Luck <tony.luck@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: Mike Travis <travis@sgi.com> Cc: ink@jurassic.park.msu.ru Cc: rmk@arm.linux.org.uk Cc: starvik@axis.com Cc: tony.luck@intel.com Cc: takata@linux-m32r.org Cc: ralf@linux-mips.org Cc: grundler@parisc-linux.org Cc: paulus@samba.org Cc: schwidefsky@de.ibm.com Cc: lethal@linux-sh.org Cc: wli@holomorphy.com Cc: davem@davemloft.net Cc: jdike@addtoit.com Cc: mingo@redhat.com
177 lines
4.6 KiB
C
177 lines
4.6 KiB
C
/* smp.h: Sparc specific SMP stuff.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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*/
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#ifndef _SPARC_SMP_H
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#define _SPARC_SMP_H
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#include <linux/threads.h>
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#include <asm/head.h>
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#include <asm/btfixup.h>
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#ifndef __ASSEMBLY__
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#include <linux/cpumask.h>
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#endif /* __ASSEMBLY__ */
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#ifdef CONFIG_SMP
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#ifndef __ASSEMBLY__
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#include <asm/ptrace.h>
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#include <asm/asi.h>
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#include <asm/atomic.h>
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/*
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* Private routines/data
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*/
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extern unsigned char boot_cpu_id;
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typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
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unsigned long, unsigned long);
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/*
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* General functions that each host system must provide.
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*/
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void sun4m_init_smp(void);
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void sun4d_init_smp(void);
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void smp_callin(void);
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void smp_boot_cpus(void);
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void smp_store_cpu_info(int);
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struct seq_file;
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void smp_bogo(struct seq_file *);
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void smp_info(struct seq_file *);
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BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
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BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
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BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
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BTFIXUPDEF_BLACKBOX(load_current)
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#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
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static inline void xc0(smpfunc_t func) { smp_cross_call(func, cpu_online_map, 0, 0, 0, 0); }
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static inline void xc1(smpfunc_t func, unsigned long arg1)
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{ smp_cross_call(func, cpu_online_map, arg1, 0, 0, 0); }
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static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
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{ smp_cross_call(func, cpu_online_map, arg1, arg2, 0, 0); }
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static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
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unsigned long arg3)
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{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, 0); }
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static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
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unsigned long arg3, unsigned long arg4)
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{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, arg4); }
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static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
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{
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xc1((smpfunc_t)func, (unsigned long)info);
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return 0;
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}
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static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
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void *info, int wait)
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{
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smp_cross_call((smpfunc_t)func, cpumask_of_cpu(cpuid),
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(unsigned long) info, 0, 0, 0);
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return 0;
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}
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static inline int cpu_logical_map(int cpu)
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{
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return cpu;
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}
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static inline int hard_smp4m_processor_id(void)
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{
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int cpuid;
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__asm__ __volatile__("rd %%tbr, %0\n\t"
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"srl %0, 12, %0\n\t"
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"and %0, 3, %0\n\t" :
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"=&r" (cpuid));
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return cpuid;
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}
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static inline int hard_smp4d_processor_id(void)
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{
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int cpuid;
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__asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
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"=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
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return cpuid;
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}
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#ifndef MODULE
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static inline int hard_smp_processor_id(void)
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{
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int cpuid;
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/* Black box - sun4m
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__asm__ __volatile__("rd %%tbr, %0\n\t"
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"srl %0, 12, %0\n\t"
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"and %0, 3, %0\n\t" :
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"=&r" (cpuid));
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- sun4d
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__asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
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"nop; nop" :
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"=&r" (cpuid));
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See btfixup.h and btfixupprep.c to understand how a blackbox works.
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*/
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__asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
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"sethi %%hi(boot_cpu_id), %0\n\t"
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"ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
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"=&r" (cpuid));
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return cpuid;
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}
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#else
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static inline int hard_smp_processor_id(void)
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{
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int cpuid;
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__asm__ __volatile__("mov %%o7, %%g1\n\t"
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"call ___f___hard_smp_processor_id\n\t"
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" nop\n\t"
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"mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
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return cpuid;
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}
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#endif
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
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#define prof_counter(__cpu) cpu_data(__cpu).counter
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void smp_setup_cpu_possible_map(void);
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#endif /* !(__ASSEMBLY__) */
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/* Sparc specific messages. */
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#define MSG_CROSS_CALL 0x0005 /* run func on cpus */
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/* Empirical PROM processor mailbox constants. If the per-cpu mailbox
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* contains something other than one of these then the ipi is from
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* Linux's active_kernel_processor. This facility exists so that
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* the boot monitor can capture all the other cpus when one catches
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* a watchdog reset or the user enters the monitor using L1-A keys.
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*/
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#define MBOX_STOPCPU 0xFB
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#define MBOX_IDLECPU 0xFC
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#define MBOX_IDLECPU2 0xFD
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#define MBOX_STOPCPU2 0xFE
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#else /* SMP */
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#define hard_smp_processor_id() 0
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#define smp_setup_cpu_possible_map() do { } while (0)
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#endif /* !(SMP) */
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#define NO_PROC_ID 0xFF
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#endif /* !(_SPARC_SMP_H) */
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