c669112663
The version of cmpxchg defined in asm-generic/system.h does not handle correctly non-long arguments. Use the version defined in cmpxchg.h instead. Signed-off-by: Mathieu Lacage <mathieu.lacage@inria.fr> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
144 lines
3.3 KiB
C
144 lines
3.3 KiB
C
/* Generic system definitions, based on MN10300 definitions.
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*
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* It should be possible to use these on really simple architectures,
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* but it serves more as a starting point for new ports.
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef __ASM_GENERIC_SYSTEM_H
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#define __ASM_GENERIC_SYSTEM_H
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <linux/irqflags.h>
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#include <asm/cmpxchg-local.h>
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#include <asm/cmpxchg.h>
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struct task_struct;
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/* context switching is now performed out-of-line in switch_to.S */
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extern struct task_struct *__switch_to(struct task_struct *,
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struct task_struct *);
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#define switch_to(prev, next, last) \
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do { \
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((last) = __switch_to((prev), (next))); \
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} while (0)
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#define arch_align_stack(x) (x)
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#define nop() asm volatile ("nop")
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#endif /* !__ASSEMBLY__ */
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/*
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* Force strict CPU ordering.
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* And yes, this is required on UP too when we're talking
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* to devices.
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*
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* This implementation only contains a compiler barrier.
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*/
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#define mb() asm volatile ("": : :"memory")
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#define rmb() mb()
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#define wmb() asm volatile ("": : :"memory")
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#ifdef CONFIG_SMP
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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#else
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#endif
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb(); } while (0)
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#define read_barrier_depends() do {} while (0)
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#define smp_read_barrier_depends() do {} while (0)
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/*
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* we make sure local_irq_enable() doesn't cause priority inversion
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*/
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#ifndef __ASSEMBLY__
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/* This function doesn't exist, so you'll get a linker error
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* if something tries to do an invalid xchg(). */
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extern void __xchg_called_with_bad_pointer(void);
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static inline
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unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
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{
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unsigned long ret, flags;
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switch (size) {
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case 1:
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#ifdef __xchg_u8
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return __xchg_u8(x, ptr);
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#else
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local_irq_save(flags);
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ret = *(volatile u8 *)ptr;
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*(volatile u8 *)ptr = x;
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local_irq_restore(flags);
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return ret;
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#endif /* __xchg_u8 */
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case 2:
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#ifdef __xchg_u16
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return __xchg_u16(x, ptr);
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#else
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local_irq_save(flags);
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ret = *(volatile u16 *)ptr;
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*(volatile u16 *)ptr = x;
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local_irq_restore(flags);
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return ret;
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#endif /* __xchg_u16 */
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case 4:
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#ifdef __xchg_u32
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return __xchg_u32(x, ptr);
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#else
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local_irq_save(flags);
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ret = *(volatile u32 *)ptr;
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*(volatile u32 *)ptr = x;
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local_irq_restore(flags);
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return ret;
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#endif /* __xchg_u32 */
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#ifdef CONFIG_64BIT
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case 8:
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#ifdef __xchg_u64
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return __xchg_u64(x, ptr);
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#else
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local_irq_save(flags);
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ret = *(volatile u64 *)ptr;
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*(volatile u64 *)ptr = x;
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local_irq_restore(flags);
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return ret;
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#endif /* __xchg_u64 */
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#endif /* CONFIG_64BIT */
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default:
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__xchg_called_with_bad_pointer();
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return x;
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}
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}
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#define xchg(ptr, x) \
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((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
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#endif /* !__ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* __ASM_GENERIC_SYSTEM_H */
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