Shaohua Li af9c142de9 [PATCH] x86_64: Force correct address space size for MTRR on some 64bit Intel Xeons ... They report 40bit, but only have 36bits of physical address space. This caused problems with setting up the correct masks for MTRR. CPUID workaround for steppings 0F33h(supporting x86) and 0F34h(supporting x86 and EM64T). Detail info can be found at: http://download.intel.com/design/Xeon/specupdt/30240216.pdf http://download.intel.com/design/Pentium4/specupdt/30235221.pdf Signed-off-by: Shaohua Li<shaohua.li@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>		2005-11-14 19:55:16 -08:00
..
amd.c
centaur.c
changelog
cyrix.c
generic.c
if.c	[PATCH] Clean up mtrr compat ioctl code	2005-10-30 17:37:13 -08:00
main.c	[PATCH] x86_64: Force correct address space size for MTRR on some 64bit Intel Xeons	2005-11-14 19:55:16 -08:00
Makefile
mtrr.h
state.c