93fe10b670
pv_cpu_ops.getreg(_IA64_REG_IP) returned constant. But the returned ip valued should be the one in the caller, not of the callee. This patch fixes that. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
242 lines
7.4 KiB
C
242 lines
7.4 KiB
C
#ifndef _ASM_IA64_INTRINSICS_H
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#define _ASM_IA64_INTRINSICS_H
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/*
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* Compiler-dependent intrinsics.
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*
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* Copyright (C) 2002-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#ifndef __ASSEMBLY__
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/* include compiler specific intrinsics */
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#include <asm/ia64regs.h>
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#ifdef __INTEL_COMPILER
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# include <asm/intel_intrin.h>
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#else
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# include <asm/gcc_intrin.h>
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#endif
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#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
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#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
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do { \
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ia64_native_set_rr(0x0000000000000000UL, (val0)); \
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ia64_native_set_rr(0x2000000000000000UL, (val1)); \
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ia64_native_set_rr(0x4000000000000000UL, (val2)); \
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ia64_native_set_rr(0x6000000000000000UL, (val3)); \
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ia64_native_set_rr(0x8000000000000000UL, (val4)); \
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} while (0)
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/*
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* Force an unresolved reference if someone tries to use
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* ia64_fetch_and_add() with a bad value.
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*/
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extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
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extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
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#define IA64_FETCHADD(tmp,v,n,sz,sem) \
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({ \
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switch (sz) { \
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case 4: \
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tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
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break; \
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\
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case 8: \
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tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
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break; \
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\
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default: \
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__bad_size_for_ia64_fetch_and_add(); \
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} \
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})
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#define ia64_fetchadd(i,v,sem) \
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({ \
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__u64 _tmp; \
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volatile __typeof__(*(v)) *_v = (v); \
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/* Can't use a switch () here: gcc isn't always smart enough for that... */ \
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if ((i) == -16) \
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IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
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else if ((i) == -8) \
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IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
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else if ((i) == -4) \
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IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
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else if ((i) == -1) \
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IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
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else if ((i) == 1) \
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IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
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else if ((i) == 4) \
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IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
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else if ((i) == 8) \
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IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
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else if ((i) == 16) \
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IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
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else \
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_tmp = __bad_increment_for_ia64_fetch_and_add(); \
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(__typeof__(*(v))) (_tmp); /* return old value */ \
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})
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#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
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/*
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* This function doesn't exist, so you'll get a linker error if
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* something tries to do an invalid xchg().
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*/
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extern void ia64_xchg_called_with_bad_pointer (void);
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#define __xchg(x,ptr,size) \
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({ \
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unsigned long __xchg_result; \
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\
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switch (size) { \
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case 1: \
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__xchg_result = ia64_xchg1((__u8 *)ptr, x); \
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break; \
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\
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case 2: \
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__xchg_result = ia64_xchg2((__u16 *)ptr, x); \
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break; \
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\
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case 4: \
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__xchg_result = ia64_xchg4((__u32 *)ptr, x); \
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break; \
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\
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case 8: \
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__xchg_result = ia64_xchg8((__u64 *)ptr, x); \
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break; \
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default: \
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ia64_xchg_called_with_bad_pointer(); \
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} \
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__xchg_result; \
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})
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#define xchg(ptr,x) \
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((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
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/*
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* Atomic compare and exchange. Compare OLD with MEM, if identical,
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* store NEW in MEM. Return the initial value in MEM. Success is
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* indicated by comparing RETURN with OLD.
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*/
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#define __HAVE_ARCH_CMPXCHG 1
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/*
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* This function doesn't exist, so you'll get a linker error
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* if something tries to do an invalid cmpxchg().
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*/
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extern long ia64_cmpxchg_called_with_bad_pointer (void);
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#define ia64_cmpxchg(sem,ptr,old,new,size) \
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({ \
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__u64 _o_, _r_; \
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\
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switch (size) { \
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case 1: _o_ = (__u8 ) (long) (old); break; \
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case 2: _o_ = (__u16) (long) (old); break; \
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case 4: _o_ = (__u32) (long) (old); break; \
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case 8: _o_ = (__u64) (long) (old); break; \
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default: break; \
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} \
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switch (size) { \
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case 1: \
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_r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
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break; \
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\
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case 2: \
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_r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
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break; \
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\
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case 4: \
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_r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
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break; \
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\
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case 8: \
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_r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
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break; \
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\
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default: \
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_r_ = ia64_cmpxchg_called_with_bad_pointer(); \
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break; \
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} \
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(__typeof__(old)) _r_; \
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})
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#define cmpxchg_acq(ptr, o, n) \
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ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
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#define cmpxchg_rel(ptr, o, n) \
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ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
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/* for compatibility with other platforms: */
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#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
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#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
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#define cmpxchg_local cmpxchg
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#define cmpxchg64_local cmpxchg64
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#ifdef CONFIG_IA64_DEBUG_CMPXCHG
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# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
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# define CMPXCHG_BUGCHECK(v) \
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do { \
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if (_cmpxchg_bugcheck_count-- <= 0) { \
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void *ip; \
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extern int printk(const char *fmt, ...); \
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ip = (void *) ia64_getreg(_IA64_REG_IP); \
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printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \
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break; \
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} \
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} while (0)
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#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
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# define CMPXCHG_BUGCHECK_DECL
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# define CMPXCHG_BUGCHECK(v)
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#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
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#endif
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#ifdef __KERNEL__
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#include <asm/paravirt_privop.h>
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#endif
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#ifndef __ASSEMBLY__
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#if defined(CONFIG_PARAVIRT) && defined(__KERNEL__)
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#define IA64_INTRINSIC_API(name) pv_cpu_ops.name
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#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
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#else
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#define IA64_INTRINSIC_API(name) ia64_native_ ## name
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#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
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#endif
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/************************************************/
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/* Instructions paravirtualized for correctness */
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/************************************************/
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/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
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/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
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* is not currently used (though it may be in a long-format VHPT system!)
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*/
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#define ia64_fc IA64_INTRINSIC_API(fc)
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#define ia64_thash IA64_INTRINSIC_API(thash)
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#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
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#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
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/************************************************/
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/* Instructions paravirtualized for performance */
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/************************************************/
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#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
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#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
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#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
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#define ia64_setreg IA64_INTRINSIC_API(setreg)
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#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
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#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
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#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
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#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
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#define ia64_intrin_local_irq_restore \
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IA64_INTRINSIC_API(intrin_local_irq_restore)
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#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_IA64_INTRINSICS_H */
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