android_kernel_xiaomi_sm8350/arch/tile/lib/mb_incoherent.S
Chris Metcalf 867e359b97 arch/tile: core support for Tilera 32-bit chips.
This change is the core kernel support for TILEPro and TILE64 chips.
No driver support (except the console driver) is included yet.

This includes the relevant Linux headers in asm/; the low-level
low-level "Tile architecture" headers in arch/, which are
shared with the hypervisor, etc., and are build-system agnostic;
and the relevant hypervisor headers in hv/.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Reviewed-by: Paul Mundt <lethal@linux-sh.org>
2010-06-04 17:11:18 -04:00

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1.0 KiB
ArmAsm

/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*
* Assembly code for invoking the HV's fence_incoherent syscall.
*/
#include <linux/linkage.h>
#include <hv/syscall_public.h>
#include <arch/abi.h>
#include <arch/chip.h>
#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS()
/*
* Invoke the hypervisor's fence_incoherent syscall, which guarantees
* that all victims for cachelines homed on this tile have reached memory.
*/
STD_ENTRY(__mb_incoherent)
moveli TREG_SYSCALL_NR_NAME, HV_SYS_fence_incoherent
swint2
jrp lr
STD_ENDPROC(__mb_incoherent)
#endif