Michael Hennerich a81501af19 [Blackfin] arch: Prevent potential Core Hang situation ... If the new value written to the PLL_CTL or VR_CTL register is the same as the previous value, the PLL wake-up will occur immediately (PLL is already locked), but the core and system clock will be bypassed for the PLL_LOCKCNT duration. For this interval, code will execute at the CLKIN rate instead of at the expected CCLK rate. Software should guard against this condition by comparing the current value to the new value before writing the new value. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>		2008-04-24 07:32:41 +08:00
..
anomaly.h	[Blackfin] arch: update to latest anomaly sheets	2007-12-24 20:05:09 +08:00
bf533.h
bfin_serial_5xx.h	[Blackfin] serial driver: Fix bug Poll RTS/CTS status in DMA mode as well	2008-02-02 14:29:25 +08:00
blackfin.h
cdefBF532.h	[Blackfin] arch: Prevent potential Core Hang situation	2008-04-24 07:32:41 +08:00
defBF532.h	[Blackfin] arch: Resolve the clash issue of UART defines between blackfin headers and include/linux/serial_reg.	2008-04-24 04:43:14 +08:00
dma.h	[Blackfin] arch: Give the DMA base registers a more descriptive name	2008-04-24 05:31:18 +08:00
irq.h
mem_init.h	[Blackfin] arch: merge ip0x-specific board changes	2008-04-24 05:03:26 +08:00
mem_map.h	Blackfin arch: cplb and map header file cleanup	2007-11-21 16:12:12 +08:00
portmux.h	[Blackfin] arch: Fix gpio label handling	2007-12-24 20:07:03 +08:00