a8a2be9492
Reduce the PCI Express hotplug driver's dependence on ACPI. We don't walk the acpi namespace anymore to build a list of bridges and devices. We go to ACPI only to run the _OSC or _OSHP methods to transition control of hotplug hardware from system BIOS to the hotplug driver, and to run the _HPP method to get hotplug device parameters like cache line size, latency timer and SERR/PERR enable from BIOS. Note that one of the side effects of this patch is that pciehp does not automatically enable the hot-added device or its DMA bus mastering capability now. It expects the device driver to do that. This may break some drivers and we will have to fix them as they are reported. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
317 lines
9.6 KiB
C
317 lines
9.6 KiB
C
/*
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* PCI Express Hot Plug Controller Driver
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
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* Copyright (C) 2001 IBM Corp.
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* Copyright (C) 2003-2004 Intel Corporation
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
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*
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*/
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#ifndef _PCIEHP_H
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#define _PCIEHP_H
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <asm/semaphore.h>
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#include <asm/io.h>
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#include <linux/pcieport_if.h>
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#include "pci_hotplug.h"
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#define MY_NAME "pciehp"
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extern int pciehp_poll_mode;
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extern int pciehp_poll_time;
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extern int pciehp_debug;
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/*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
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#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
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#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
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#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
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#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
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struct hotplug_params {
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u8 cache_line_size;
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u8 latency_timer;
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u8 enable_serr;
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u8 enable_perr;
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};
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struct pci_func {
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struct pci_func *next;
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u8 bus;
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u8 device;
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u8 function;
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u8 is_a_board;
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u16 status;
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u8 configured;
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u8 switch_save;
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u8 presence_save;
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u16 reserved2;
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u32 config_space[0x20];
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struct pci_dev* pci_dev;
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};
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struct slot {
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struct slot *next;
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u8 bus;
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u8 device;
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u32 number;
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u8 is_a_board;
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u8 configured;
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u8 state;
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u8 switch_save;
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u8 presence_save;
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u32 capabilities;
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u16 reserved2;
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struct timer_list task_event;
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u8 hp_slot;
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struct controller *ctrl;
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struct hpc_ops *hpc_ops;
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struct hotplug_slot *hotplug_slot;
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struct list_head slot_list;
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};
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struct event_info {
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u32 event_type;
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u8 hp_slot;
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};
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struct controller {
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struct controller *next;
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struct semaphore crit_sect; /* critical section semaphore */
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void *hpc_ctlr_handle; /* HPC controller handle */
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int num_slots; /* Number of slots on ctlr */
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int slot_num_inc; /* 1 or -1 */
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struct pci_dev *pci_dev;
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struct pci_bus *pci_bus;
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struct event_info event_queue[10];
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struct slot *slot;
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struct hpc_ops *hpc_ops;
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wait_queue_head_t queue; /* sleep & wake process */
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u8 next_event;
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u8 seg;
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u8 bus;
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u8 device;
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u8 function;
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u8 rev;
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u8 slot_device_offset;
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u8 add_support;
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enum pci_bus_speed speed;
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u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
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u8 slot_bus; /* Bus where the slots handled by this controller sit */
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u8 ctrlcap;
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u16 vendor_id;
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u8 cap_base;
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};
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#define INT_BUTTON_IGNORE 0
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#define INT_PRESENCE_ON 1
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#define INT_PRESENCE_OFF 2
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#define INT_SWITCH_CLOSE 3
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#define INT_SWITCH_OPEN 4
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#define INT_POWER_FAULT 5
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#define INT_POWER_FAULT_CLEAR 6
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#define INT_BUTTON_PRESS 7
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#define INT_BUTTON_RELEASE 8
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#define INT_BUTTON_CANCEL 9
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#define STATIC_STATE 0
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#define BLINKINGON_STATE 1
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#define BLINKINGOFF_STATE 2
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#define POWERON_STATE 3
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#define POWEROFF_STATE 4
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#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
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/* Error messages */
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#define INTERLOCK_OPEN 0x00000002
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#define ADD_NOT_SUPPORTED 0x00000003
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#define CARD_FUNCTIONING 0x00000005
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#define ADAPTER_NOT_SAME 0x00000006
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#define NO_ADAPTER_PRESENT 0x00000009
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#define NOT_ENOUGH_RESOURCES 0x0000000B
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#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
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#define WRONG_BUS_FREQUENCY 0x0000000D
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#define POWER_FAILURE 0x0000000E
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#define REMOVE_NOT_SUPPORTED 0x00000003
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#define DISABLE_CARD 1
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/* Field definitions in Slot Capabilities Register */
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#define ATTN_BUTTN_PRSN 0x00000001
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#define PWR_CTRL_PRSN 0x00000002
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#define MRL_SENS_PRSN 0x00000004
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#define ATTN_LED_PRSN 0x00000008
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#define PWR_LED_PRSN 0x00000010
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#define HP_SUPR_RM_SUP 0x00000020
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#define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN)
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#define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN)
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#define MRL_SENS(cap) (cap & MRL_SENS_PRSN)
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#define ATTN_LED(cap) (cap & ATTN_LED_PRSN)
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#define PWR_LED(cap) (cap & PWR_LED_PRSN)
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#define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP)
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/*
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* error Messages
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*/
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#define msg_initialization_err "Initialization failure, error=%d\n"
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#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
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#define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
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#define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
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#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
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#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
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#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
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#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
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/* controller functions */
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extern int pciehp_event_start_thread (void);
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extern void pciehp_event_stop_thread (void);
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extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
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extern struct pci_func *pciehp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
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extern int pciehp_enable_slot (struct slot *slot);
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extern int pciehp_disable_slot (struct slot *slot);
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extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id);
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extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id);
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extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
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extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
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/* extern void long_delay (int delay); */
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/* pci functions */
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extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
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/*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
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extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
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extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
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extern int pciehp_configure_device (struct slot *ctrl);
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extern int pciehp_unconfigure_device (struct pci_func* func);
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extern int get_hp_hw_control_from_firmware(struct pci_dev *dev);
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extern void get_hp_params_from_firmware(struct pci_dev *dev,
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struct hotplug_params *hpp);
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/* Global variables */
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extern struct controller *pciehp_ctrl_list;
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extern struct pci_func *pciehp_slot_list[256];
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/* Inline functions */
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static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
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{
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struct slot *p_slot, *tmp_slot = NULL;
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p_slot = ctrl->slot;
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dbg("p_slot = %p\n", p_slot);
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while (p_slot && (p_slot->device != device)) {
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tmp_slot = p_slot;
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p_slot = p_slot->next;
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dbg("In while loop, p_slot = %p\n", p_slot);
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}
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if (p_slot == NULL) {
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err("ERROR: pciehp_find_slot device=0x%x\n", device);
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p_slot = tmp_slot;
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}
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return p_slot;
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}
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static inline int wait_for_ctrl_irq(struct controller *ctrl)
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{
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int retval = 0;
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DECLARE_WAITQUEUE(wait, current);
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dbg("%s : start\n", __FUNCTION__);
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add_wait_queue(&ctrl->queue, &wait);
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if (!pciehp_poll_mode)
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/* Sleep for up to 1 second */
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msleep_interruptible(1000);
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else
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msleep_interruptible(2500);
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remove_wait_queue(&ctrl->queue, &wait);
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if (signal_pending(current))
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retval = -EINTR;
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dbg("%s : end\n", __FUNCTION__);
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return retval;
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}
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#define SLOT_NAME_SIZE 10
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static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
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{
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snprintf(buffer, buffer_size, "%04d_%04d", slot->bus, slot->number);
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}
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enum php_ctlr_type {
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PCI,
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ISA,
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ACPI
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};
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typedef u8(*php_intr_callback_t) (unsigned int change_id, void *instance_id);
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int pcie_init(struct controller *ctrl, struct pcie_device *dev,
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php_intr_callback_t attention_button_callback,
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php_intr_callback_t switch_change_callback,
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php_intr_callback_t presence_change_callback,
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php_intr_callback_t power_fault_callback);
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/* This has no meaning for PCI Express, as there is only 1 slot per port */
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int pcie_get_ctlr_slot_config(struct controller *ctrl,
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int *num_ctlr_slots,
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int *first_device_num,
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int *physical_slot_num,
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u8 *ctrlcap);
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struct hpc_ops {
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int (*power_on_slot) (struct slot *slot);
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int (*power_off_slot) (struct slot *slot);
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int (*get_power_status) (struct slot *slot, u8 *status);
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int (*get_attention_status) (struct slot *slot, u8 *status);
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int (*set_attention_status) (struct slot *slot, u8 status);
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int (*get_latch_status) (struct slot *slot, u8 *status);
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int (*get_adapter_status) (struct slot *slot, u8 *status);
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int (*get_max_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
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int (*get_cur_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
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int (*get_max_lnk_width) (struct slot *slot, enum pcie_link_width *value);
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int (*get_cur_lnk_width) (struct slot *slot, enum pcie_link_width *value);
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int (*query_power_fault) (struct slot *slot);
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void (*green_led_on) (struct slot *slot);
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void (*green_led_off) (struct slot *slot);
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void (*green_led_blink) (struct slot *slot);
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void (*release_ctlr) (struct controller *ctrl);
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int (*check_lnk_status) (struct controller *ctrl);
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};
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#endif /* _PCIEHP_H */
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