9c8ced511e
cx23885: Checkpatch compliance Signed-off-by: Steven Toth <stoth@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
627 lines
18 KiB
C
627 lines
18 KiB
C
/*
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* Driver for the Conexant CX23885 PCIe bridge
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*
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* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/fs.h>
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#include <linux/kthread.h>
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#include <linux/file.h>
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#include <linux/suspend.h>
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#include "cx23885.h"
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#include <media/v4l2-common.h>
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#include "s5h1409.h"
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#include "s5h1411.h"
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#include "mt2131.h"
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#include "tda8290.h"
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#include "tda18271.h"
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#include "lgdt330x.h"
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#include "xc5000.h"
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#include "tda10048.h"
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#include "tuner-xc2028.h"
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#include "tuner-simple.h"
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#include "dib7000p.h"
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#include "dibx000_common.h"
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#include "zl10353.h"
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static unsigned int debug;
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#define dprintk(level, fmt, arg...)\
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do { if (debug >= level)\
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printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
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} while (0)
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/* ------------------------------------------------------------------ */
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static unsigned int alt_tuner;
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module_param(alt_tuner, int, 0644);
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MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
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/* ------------------------------------------------------------------ */
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static int dvb_buf_setup(struct videobuf_queue *q,
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unsigned int *count, unsigned int *size)
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{
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struct cx23885_tsport *port = q->priv_data;
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port->ts_packet_size = 188 * 4;
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port->ts_packet_count = 32;
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*size = port->ts_packet_size * port->ts_packet_count;
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*count = 32;
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return 0;
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}
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static int dvb_buf_prepare(struct videobuf_queue *q,
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struct videobuf_buffer *vb, enum v4l2_field field)
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{
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struct cx23885_tsport *port = q->priv_data;
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return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
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}
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static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
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{
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struct cx23885_tsport *port = q->priv_data;
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cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
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}
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static void dvb_buf_release(struct videobuf_queue *q,
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struct videobuf_buffer *vb)
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{
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cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
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}
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static struct videobuf_queue_ops dvb_qops = {
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.buf_setup = dvb_buf_setup,
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.buf_prepare = dvb_buf_prepare,
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.buf_queue = dvb_buf_queue,
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.buf_release = dvb_buf_release,
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};
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static struct s5h1409_config hauppauge_generic_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_ON,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct tda10048_config hauppauge_hvr1200_config = {
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.demod_address = 0x10 >> 1,
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.output_mode = TDA10048_SERIAL_OUTPUT,
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.fwbulkwritelen = TDA10048_BULKWRITE_200,
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.inversion = TDA10048_INVERSION_ON
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};
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static struct s5h1409_config hauppauge_ezqam_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_OFF,
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.qam_if = 4000,
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.inversion = S5H1409_INVERSION_ON,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1409_config hauppauge_hvr1800lp_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_OFF,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1409_config hauppauge_hvr1500_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_OFF,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct mt2131_config hauppauge_generic_tunerconfig = {
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0x61
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};
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static struct lgdt330x_config fusionhdtv_5_express = {
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.demod_address = 0x0e,
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.demod_chip = LGDT3303,
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.serial_mpeg = 0x40,
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};
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static struct s5h1409_config hauppauge_hvr1500q_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_ON,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1409_config dvico_s5h1409_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_ON,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1411_config dvico_s5h1411_config = {
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.output_mode = S5H1411_SERIAL_OUTPUT,
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.gpio = S5H1411_GPIO_ON,
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.qam_if = S5H1411_IF_44000,
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.vsb_if = S5H1411_IF_44000,
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.inversion = S5H1411_INVERSION_OFF,
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.status_mode = S5H1411_DEMODLOCKING,
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.mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
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.i2c_address = 0x61,
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.if_khz = 5380,
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};
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static struct xc5000_config dvico_xc5000_tunerconfig = {
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.i2c_address = 0x64,
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.if_khz = 5380,
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};
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static struct tda829x_config tda829x_no_probe = {
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.probe_tuner = TDA829X_DONT_PROBE,
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};
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static struct tda18271_std_map hauppauge_tda18271_std_map = {
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.atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
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.if_lvl = 6, .rfagc_top = 0x37 },
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.qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
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.if_lvl = 6, .rfagc_top = 0x37 },
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};
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static struct tda18271_config hauppauge_tda18271_config = {
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.std_map = &hauppauge_tda18271_std_map,
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.gate = TDA18271_GATE_ANALOG,
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};
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static struct tda18271_config hauppauge_hvr1200_tuner_config = {
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.gate = TDA18271_GATE_ANALOG,
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};
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static struct dibx000_agc_config xc3028_agc_config = {
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BAND_VHF | BAND_UHF, /* band_caps */
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/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
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* P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
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* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
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* P_agc_nb_est=2, P_agc_write=0
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*/
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(0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
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(3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
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712, /* inv_gain */
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21, /* time_stabiliz */
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0, /* alpha_level */
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118, /* thlock */
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0, /* wbd_inv */
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2867, /* wbd_ref */
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0, /* wbd_sel */
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2, /* wbd_alpha */
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0, /* agc1_max */
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0, /* agc1_min */
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39718, /* agc2_max */
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9930, /* agc2_min */
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0, /* agc1_pt1 */
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0, /* agc1_pt2 */
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0, /* agc1_pt3 */
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0, /* agc1_slope1 */
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0, /* agc1_slope2 */
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0, /* agc2_pt1 */
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128, /* agc2_pt2 */
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29, /* agc2_slope1 */
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29, /* agc2_slope2 */
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17, /* alpha_mant */
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27, /* alpha_exp */
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23, /* beta_mant */
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51, /* beta_exp */
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1, /* perform_agc_softsplit */
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};
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/* PLL Configuration for COFDM BW_MHz = 8.000000
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* With external clock = 30.000000 */
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static struct dibx000_bandwidth_config xc3028_bw_config = {
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60000, /* internal */
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30000, /* sampling */
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1, /* pll_cfg: prediv */
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8, /* pll_cfg: ratio */
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3, /* pll_cfg: range */
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1, /* pll_cfg: reset */
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0, /* pll_cfg: bypass */
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0, /* misc: refdiv */
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0, /* misc: bypclk_div */
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1, /* misc: IO_CLK_en_core */
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1, /* misc: ADClkSrc */
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0, /* misc: modulo */
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(3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
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(1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
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20452225, /* timf */
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30000000 /* xtal_hz */
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};
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static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
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.output_mpeg2_in_188_bytes = 1,
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.hostbus_diversity = 1,
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.tuner_is_baseband = 0,
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.update_lna = NULL,
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.agc_config_count = 1,
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.agc = &xc3028_agc_config,
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.bw = &xc3028_bw_config,
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.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
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.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
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.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
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.pwm_freq_div = 0,
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.agc_control = NULL,
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.spur_protect = 0,
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.output_mode = OUTMODE_MPEG2_SERIAL,
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};
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static struct zl10353_config dvico_fusionhdtv_xc3028 = {
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.demod_address = 0x0f,
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.if2 = 45600,
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.no_tuner = 1,
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};
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static int dvb_register(struct cx23885_tsport *port)
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{
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struct cx23885_dev *dev = port->dev;
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struct cx23885_i2c *i2c_bus = NULL;
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struct videobuf_dvb_frontend *fe0;
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/* Get the first frontend */
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fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
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if (!fe0)
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return -EINVAL;
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/* init struct videobuf_dvb */
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fe0->dvb.name = dev->name;
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/* init frontend */
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switch (dev->board) {
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case CX23885_BOARD_HAUPPAUGE_HVR1250:
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i2c_bus = &dev->i2c_bus[0];
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fe0->dvb.frontend = dvb_attach(s5h1409_attach,
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&hauppauge_generic_config,
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&i2c_bus->i2c_adap);
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if (fe0->dvb.frontend != NULL) {
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dvb_attach(mt2131_attach, fe0->dvb.frontend,
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&i2c_bus->i2c_adap,
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&hauppauge_generic_tunerconfig, 0);
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}
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break;
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case CX23885_BOARD_HAUPPAUGE_HVR1800:
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i2c_bus = &dev->i2c_bus[0];
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switch (alt_tuner) {
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case 1:
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fe0->dvb.frontend =
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dvb_attach(s5h1409_attach,
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&hauppauge_ezqam_config,
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&i2c_bus->i2c_adap);
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if (fe0->dvb.frontend != NULL) {
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dvb_attach(tda829x_attach, fe0->dvb.frontend,
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&dev->i2c_bus[1].i2c_adap, 0x42,
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&tda829x_no_probe);
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dvb_attach(tda18271_attach, fe0->dvb.frontend,
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0x60, &dev->i2c_bus[1].i2c_adap,
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&hauppauge_tda18271_config);
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}
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break;
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case 0:
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default:
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fe0->dvb.frontend =
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dvb_attach(s5h1409_attach,
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&hauppauge_generic_config,
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&i2c_bus->i2c_adap);
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if (fe0->dvb.frontend != NULL)
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dvb_attach(mt2131_attach, fe0->dvb.frontend,
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&i2c_bus->i2c_adap,
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&hauppauge_generic_tunerconfig, 0);
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break;
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}
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break;
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case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
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i2c_bus = &dev->i2c_bus[0];
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fe0->dvb.frontend = dvb_attach(s5h1409_attach,
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&hauppauge_hvr1800lp_config,
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&i2c_bus->i2c_adap);
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if (fe0->dvb.frontend != NULL) {
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dvb_attach(mt2131_attach, fe0->dvb.frontend,
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&i2c_bus->i2c_adap,
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&hauppauge_generic_tunerconfig, 0);
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}
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break;
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case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
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i2c_bus = &dev->i2c_bus[0];
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fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
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&fusionhdtv_5_express,
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&i2c_bus->i2c_adap);
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if (fe0->dvb.frontend != NULL) {
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dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
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&i2c_bus->i2c_adap, 0x61,
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TUNER_LG_TDVS_H06XF);
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}
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break;
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case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
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i2c_bus = &dev->i2c_bus[1];
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fe0->dvb.frontend = dvb_attach(s5h1409_attach,
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&hauppauge_hvr1500q_config,
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&dev->i2c_bus[0].i2c_adap);
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if (fe0->dvb.frontend != NULL)
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dvb_attach(xc5000_attach, fe0->dvb.frontend,
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&i2c_bus->i2c_adap,
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&hauppauge_hvr1500q_tunerconfig);
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break;
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case CX23885_BOARD_HAUPPAUGE_HVR1500:
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i2c_bus = &dev->i2c_bus[1];
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fe0->dvb.frontend = dvb_attach(s5h1409_attach,
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&hauppauge_hvr1500_config,
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&dev->i2c_bus[0].i2c_adap);
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if (fe0->dvb.frontend != NULL) {
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struct dvb_frontend *fe;
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struct xc2028_config cfg = {
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.i2c_adap = &i2c_bus->i2c_adap,
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.i2c_addr = 0x61,
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};
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static struct xc2028_ctrl ctl = {
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.fname = XC2028_DEFAULT_FIRMWARE,
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.max_len = 64,
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.scode_table = XC3028_FE_OREN538,
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};
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fe = dvb_attach(xc2028_attach,
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fe0->dvb.frontend, &cfg);
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if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
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fe->ops.tuner_ops.set_config(fe, &ctl);
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}
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break;
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case CX23885_BOARD_HAUPPAUGE_HVR1200:
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case CX23885_BOARD_HAUPPAUGE_HVR1700:
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i2c_bus = &dev->i2c_bus[0];
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fe0->dvb.frontend = dvb_attach(tda10048_attach,
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&hauppauge_hvr1200_config,
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&i2c_bus->i2c_adap);
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if (fe0->dvb.frontend != NULL) {
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dvb_attach(tda829x_attach, fe0->dvb.frontend,
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&dev->i2c_bus[1].i2c_adap, 0x42,
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&tda829x_no_probe);
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dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_hvr1200_tuner_config);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1400:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(dib7000p_attach,
|
|
&i2c_bus->i2c_adap,
|
|
0x12, &hauppauge_hvr1400_dib7000_config);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &dev->i2c_bus[1].i2c_adap,
|
|
.i2c_addr = 0x64,
|
|
};
|
|
static struct xc2028_ctrl ctl = {
|
|
.fname = XC3028L_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = 5000,
|
|
/* This is true for all demods with
|
|
v36 firmware? */
|
|
.type = XC2028_D2633,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach,
|
|
fe0->dvb.frontend, &cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctl);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
|
|
i2c_bus = &dev->i2c_bus[port->nr - 1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(s5h1409_attach,
|
|
&dvico_s5h1409_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend == NULL)
|
|
fe0->dvb.frontend = dvb_attach(s5h1411_attach,
|
|
&dvico_s5h1411_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
dvb_attach(xc5000_attach, fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&dvico_xc5000_tunerconfig);
|
|
break;
|
|
case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
|
|
i2c_bus = &dev->i2c_bus[port->nr - 1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(zl10353_attach,
|
|
&dvico_fusionhdtv_xc3028,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &i2c_bus->i2c_adap,
|
|
.i2c_addr = 0x61,
|
|
};
|
|
static struct xc2028_ctrl ctl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_ZARLINK456,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
|
|
&cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctl);
|
|
}
|
|
break;
|
|
}
|
|
case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
|
|
fe0->dvb.frontend = dvb_attach(zl10353_attach,
|
|
&dvico_fusionhdtv_xc3028,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &dev->i2c_bus[1].i2c_adap,
|
|
.i2c_addr = 0x61,
|
|
};
|
|
static struct xc2028_ctrl ctl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_ZARLINK456,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
|
|
&cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctl);
|
|
}
|
|
break;
|
|
default:
|
|
printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
|
|
" isn't supported yet\n",
|
|
dev->name);
|
|
break;
|
|
}
|
|
if (NULL == fe0->dvb.frontend) {
|
|
printk(KERN_ERR "%s: frontend initialization failed\n",
|
|
dev->name);
|
|
return -1;
|
|
}
|
|
/* define general-purpose callback pointer */
|
|
fe0->dvb.frontend->callback = cx23885_tuner_callback;
|
|
|
|
/* Put the analog decoder in standby to keep it quiet */
|
|
cx23885_call_i2c_clients(i2c_bus, TUNER_SET_STANDBY, NULL);
|
|
|
|
if (fe0->dvb.frontend->ops.analog_ops.standby)
|
|
fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
|
|
|
|
/* register everything */
|
|
return videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
|
|
&dev->pci->dev, adapter_nr, 0);
|
|
|
|
}
|
|
|
|
int cx23885_dvb_register(struct cx23885_tsport *port)
|
|
{
|
|
|
|
struct videobuf_dvb_frontend *fe0;
|
|
struct cx23885_dev *dev = port->dev;
|
|
int err, i;
|
|
|
|
/* Here we need to allocate the correct number of frontends,
|
|
* as reflected in the cards struct. The reality is that currrently
|
|
* no cx23885 boards support this - yet. But, if we don't modify this
|
|
* code then the second frontend would never be allocated (later)
|
|
* and fail with error before the attach in dvb_register().
|
|
* Without these changes we risk an OOPS later. The changes here
|
|
* are for safety, and should provide a good foundation for the
|
|
* future addition of any multi-frontend cx23885 based boards.
|
|
*/
|
|
printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
|
|
port->num_frontends);
|
|
|
|
for (i = 1; i <= port->num_frontends; i++) {
|
|
if (videobuf_dvb_alloc_frontend(dev,
|
|
&port->frontends, i) == NULL) {
|
|
printk(KERN_ERR "%s() failed to alloc\n", __func__);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
|
|
if (!fe0)
|
|
err = -EINVAL;
|
|
|
|
dprintk(1, "%s\n", __func__);
|
|
dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
|
|
dev->board,
|
|
dev->name,
|
|
dev->pci_bus,
|
|
dev->pci_slot);
|
|
|
|
err = -ENODEV;
|
|
|
|
/* dvb stuff */
|
|
/* We have to init the queue for each frontend on a port. */
|
|
printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
|
|
videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
|
|
&dev->pci->dev, &port->slock,
|
|
V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
|
|
sizeof(struct cx23885_buffer), port);
|
|
}
|
|
err = dvb_register(port);
|
|
if (err != 0)
|
|
printk(KERN_ERR "%s() dvb_register failed err = %d\n",
|
|
__func__, err);
|
|
|
|
return err;
|
|
}
|
|
|
|
int cx23885_dvb_unregister(struct cx23885_tsport *port)
|
|
{
|
|
struct videobuf_dvb_frontend *fe0;
|
|
|
|
/* FIXME: in an error condition where the we have
|
|
* an expected number of frontends (attach problem)
|
|
* then this might not clean up correctly, if 1
|
|
* is invalid.
|
|
* This comment only applies to future boards IF they
|
|
* implement MFE support.
|
|
*/
|
|
fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
|
|
if (fe0->dvb.frontend)
|
|
videobuf_dvb_unregister_bus(&port->frontends);
|
|
|
|
return 0;
|
|
}
|
|
|