android_kernel_xiaomi_sm8350/arch/sh/include/cpu-sh3/cpu/cacheflush.h
Adrian Bunk 7265706c8f fix SH7705_CACHE_32KB compilation
This patches compile errors like the following caused by
commit 51f3547d61
(sh: Allow SH-3 and SH-5 to use common headers):

<--  snip  -->

...
  CC      arch/sh/mm/init.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/sh/mm/init.c: In function 'mem_init':
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/sh/mm/init.c:232: error: implicit declaration of function 'p3_cache_init'
make[2]: *** [arch/sh/mm/init.o] Error 1
make[1]: *** [arch/sh/mm] Error 2
...
  CC      kernel/fork.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c: In function 'dup_mmap':
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c:323: error: implicit declaration of function 'flush_dcache_mmap_lock'
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c:325: error: implicit declaration of function 'flush_dcache_mmap_unlock'
make[2]: *** [kernel/fork.o] Error 1

<--  snip  -->

Reported-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-08-11 20:17:49 +09:00

47 lines
1.6 KiB
C

/*
* include/asm-sh/cpu-sh3/cacheflush.h
*
* Copyright (C) 1999 Niibe Yutaka
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef __ASM_CPU_SH3_CACHEFLUSH_H
#define __ASM_CPU_SH3_CACHEFLUSH_H
#if defined(CONFIG_SH7705_CACHE_32KB)
/* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the
* SH4. Unlike the SH4 this is a unified cache so we need to do some work
* in mmap when 'exec'ing a new binary
*/
/* 32KB cache, 4kb PAGE sizes need to check bit 12 */
#define CACHE_ALIAS 0x00001000
#define PG_mapped PG_arch_1
void flush_cache_all(void);
void flush_cache_mm(struct mm_struct *mm);
#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end);
void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
void flush_dcache_page(struct page *pg);
void flush_icache_range(unsigned long start, unsigned long end);
void flush_icache_page(struct vm_area_struct *vma, struct page *page);
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
/* SH3 has unified cache so no special action needed here */
#define flush_cache_sigtramp(vaddr) do { } while (0)
#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
#define p3_cache_init() do { } while (0)
#else
#include <cpu-common/cpu/cacheflush.h>
#endif
#endif /* __ASM_CPU_SH3_CACHEFLUSH_H */