android_kernel_xiaomi_sm8350/arch/powerpc/platforms/pseries/xics.h
Nathan Fontenot c3e8506c54 [POWERPC] Split xics_teardown_cpu()
This splits off the kexec path bits of the xics_teardown_cpu() routine
into its own xics_kexec_teardown_cpu() routine.  With the previous
combined routine the CPPR for a cpu that is being removed may have its
CPPR reset in the plpar_eoi() call (which explicitly sets the CPPR to
a non-zero value).  Splitting of the kexec bits of the code prevents
this from happening in the cpu remove path.

Once again, this does not cause the cpu remove from the kernel to
fail, but it does cause cpu dlpar operations to not be able to return
the cpu to the hypervisor.

Signed-off-by: Nathan Fontenot <nfont@austin.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-02-07 11:40:19 +11:00

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C

/*
* arch/powerpc/platforms/pseries/xics.h
*
* Copyright 2000 IBM Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _POWERPC_KERNEL_XICS_H
#define _POWERPC_KERNEL_XICS_H
#include <linux/cache.h>
extern void xics_init_IRQ(void);
extern void xics_setup_cpu(void);
extern void xics_teardown_cpu(void);
extern void xics_kexec_teardown_cpu(int secondary);
extern void xics_cause_IPI(int cpu);
extern void xics_request_IPIs(void);
extern void xics_migrate_irqs_away(void);
struct xics_ipi_struct {
volatile unsigned long value;
} ____cacheline_aligned;
extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
struct irq_desc;
extern void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc);
#endif /* _POWERPC_KERNEL_XICS_H */