b025279316
As we now store enough information in the device_node to allocate the irq number in pcibios_final_fixup. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
175 lines
5.0 KiB
C
175 lines
5.0 KiB
C
#ifndef _ASM_POWERPC_PCI_BRIDGE_H
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#define _ASM_POWERPC_PCI_BRIDGE_H
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#ifdef __KERNEL__
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#ifndef CONFIG_PPC64
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#include <asm-ppc/pci-bridge.h>
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#else
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#include <linux/pci.h>
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#include <linux/list.h>
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/*
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* Structure of a PCI controller (host bridge)
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*/
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struct pci_controller {
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struct pci_bus *bus;
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char is_dynamic;
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void *arch_data;
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struct list_head list_node;
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int first_busno;
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int last_busno;
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void __iomem *io_base_virt;
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unsigned long io_base_phys;
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/* Some machines have a non 1:1 mapping of
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* the PCI memory space in the CPU bus space
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*/
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unsigned long pci_mem_offset;
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unsigned long pci_io_size;
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struct pci_ops *ops;
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volatile unsigned int __iomem *cfg_addr;
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volatile void __iomem *cfg_data;
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/* Currently, we limit ourselves to 1 IO range and 3 mem
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* ranges since the common pci_bus structure can't handle more
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*/
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struct resource io_resource;
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struct resource mem_resources[3];
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int global_number;
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int local_number;
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unsigned long buid;
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unsigned long dma_window_base_cur;
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unsigned long dma_window_size;
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};
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/*
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* PCI stuff, for nodes representing PCI devices, pointed to
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* by device_node->data.
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*/
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struct pci_controller;
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struct iommu_table;
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struct pci_dn {
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int busno; /* pci bus number */
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int bussubno; /* pci subordinate bus number */
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int devfn; /* pci device and function number */
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int class_code; /* pci device class */
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#ifdef CONFIG_PPC_PSERIES
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int eeh_mode; /* See eeh.h for possible EEH_MODEs */
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int eeh_config_addr;
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int eeh_pe_config_addr; /* new-style partition endpoint address */
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int eeh_check_count; /* # times driver ignored error */
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int eeh_freeze_count; /* # times this device froze up. */
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#endif
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int pci_ext_config_space; /* for pci devices */
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struct pci_controller *phb; /* for pci devices */
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struct iommu_table *iommu_table; /* for phb's or bridges */
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struct pci_dev *pcidev; /* back-pointer to the pci device */
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struct device_node *node; /* back-pointer to the device_node */
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#ifdef CONFIG_PPC_ISERIES
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int Flags; /* Possible flags(disable/bist)*/
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u8 LogicalSlot; /* Hv Slot Index for Tces */
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#endif
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u32 config_space[16]; /* saved PCI config space */
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};
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/* Get the pointer to a device_node's pci_dn */
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#define PCI_DN(dn) ((struct pci_dn *) (dn)->data)
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struct device_node *fetch_dev_dn(struct pci_dev *dev);
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/* Get a device_node from a pci_dev. This code must be fast except
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* in the case where the sysdata is incorrect and needs to be fixed
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* up (this will only happen once).
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* In this case the sysdata will have been inherited from a PCI host
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* bridge or a PCI-PCI bridge further up the tree, so it will point
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* to a valid struct pci_dn, just not the one we want.
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*/
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static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev)
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{
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struct device_node *dn = dev->sysdata;
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struct pci_dn *pdn = dn->data;
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if (pdn && pdn->devfn == dev->devfn && pdn->busno == dev->bus->number)
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return dn; /* fast path. sysdata is good */
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return fetch_dev_dn(dev);
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}
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static inline int pci_device_from_OF_node(struct device_node *np,
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u8 *bus, u8 *devfn)
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{
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if (!PCI_DN(np))
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return -ENODEV;
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*bus = PCI_DN(np)->busno;
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*devfn = PCI_DN(np)->devfn;
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return 0;
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}
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static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
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{
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if (bus->self)
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return pci_device_to_OF_node(bus->self);
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else
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return bus->sysdata; /* Must be root bus (PHB) */
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}
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/** Find the bus corresponding to the indicated device node */
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struct pci_bus * pcibios_find_pci_bus(struct device_node *dn);
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extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
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struct device_node *dev, int primary);
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/** Remove all of the PCI devices under this bus */
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void pcibios_remove_pci_devices(struct pci_bus *bus);
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/** Discover new pci devices under this bus, and add them */
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void pcibios_add_pci_devices(struct pci_bus * bus);
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void pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus);
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extern int pcibios_remove_root_bus(struct pci_controller *phb);
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static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
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{
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struct device_node *busdn = bus->sysdata;
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BUG_ON(busdn == NULL);
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return PCI_DN(busdn)->phb;
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}
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extern struct pci_controller*
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pci_find_hose_for_OF_device(struct device_node* node);
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extern struct pci_controller *
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pcibios_alloc_controller(struct device_node *dev);
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extern void pcibios_free_controller(struct pci_controller *phb);
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#ifdef CONFIG_PCI
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extern unsigned long pci_address_to_pio(phys_addr_t address);
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#else
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static inline unsigned long pci_address_to_pio(phys_addr_t address)
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{
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return (unsigned long)-1;
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}
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#endif
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/* Return values for ppc_md.pci_probe_mode function */
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#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
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#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
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#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
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#endif /* CONFIG_PPC64 */
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#endif /* __KERNEL__ */
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#endif
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