1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
489 lines
11 KiB
C
489 lines
11 KiB
C
/*
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* linux/arch/x86_64/nmi.c
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*
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* NMI watchdog support on APIC systems
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*
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* Started by Ingo Molnar <mingo@redhat.com>
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*
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* Fixes:
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* Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
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* Mikael Pettersson : Power Management for local APIC NMI watchdog.
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* Pavel Machek and
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* Mikael Pettersson : PM converted to driver model. Disable/enable API.
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*/
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#include <linux/config.h>
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#include <linux/mm.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/bootmem.h>
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#include <linux/smp_lock.h>
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#include <linux/interrupt.h>
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#include <linux/mc146818rtc.h>
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#include <linux/kernel_stat.h>
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#include <linux/module.h>
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#include <linux/sysdev.h>
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#include <linux/nmi.h>
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#include <linux/sysctl.h>
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#include <asm/smp.h>
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#include <asm/mtrr.h>
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#include <asm/mpspec.h>
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#include <asm/nmi.h>
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#include <asm/msr.h>
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#include <asm/proto.h>
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#include <asm/kdebug.h>
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/*
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* lapic_nmi_owner tracks the ownership of the lapic NMI hardware:
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* - it may be reserved by some other driver, or not
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* - when not reserved by some other driver, it may be used for
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* the NMI watchdog, or not
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*
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* This is maintained separately from nmi_active because the NMI
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* watchdog may also be driven from the I/O APIC timer.
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*/
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static DEFINE_SPINLOCK(lapic_nmi_owner_lock);
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static unsigned int lapic_nmi_owner;
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#define LAPIC_NMI_WATCHDOG (1<<0)
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#define LAPIC_NMI_RESERVED (1<<1)
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/* nmi_active:
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* +1: the lapic NMI watchdog is active, but can be disabled
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* 0: the lapic NMI watchdog has not been set up, and cannot
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* be enabled
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* -1: the lapic NMI watchdog is disabled, but can be enabled
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*/
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int nmi_active; /* oprofile uses this */
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int panic_on_timeout;
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unsigned int nmi_watchdog = NMI_DEFAULT;
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static unsigned int nmi_hz = HZ;
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unsigned int nmi_perfctr_msr; /* the MSR to reset in NMI handler */
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/* Note that these events don't tick when the CPU idles. This means
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the frequency varies with CPU load. */
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#define K7_EVNTSEL_ENABLE (1 << 22)
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#define K7_EVNTSEL_INT (1 << 20)
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#define K7_EVNTSEL_OS (1 << 17)
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#define K7_EVNTSEL_USR (1 << 16)
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#define K7_EVENT_CYCLES_PROCESSOR_IS_RUNNING 0x76
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#define K7_NMI_EVENT K7_EVENT_CYCLES_PROCESSOR_IS_RUNNING
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#define P6_EVNTSEL0_ENABLE (1 << 22)
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#define P6_EVNTSEL_INT (1 << 20)
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#define P6_EVNTSEL_OS (1 << 17)
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#define P6_EVNTSEL_USR (1 << 16)
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#define P6_EVENT_CPU_CLOCKS_NOT_HALTED 0x79
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#define P6_NMI_EVENT P6_EVENT_CPU_CLOCKS_NOT_HALTED
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/* Run after command line and cpu_init init, but before all other checks */
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void __init nmi_watchdog_default(void)
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{
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if (nmi_watchdog != NMI_DEFAULT)
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return;
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/* For some reason the IO APIC watchdog doesn't work on the AMD
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8111 chipset. For now switch to local APIC mode using
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perfctr0 there. On Intel CPUs we don't have code to handle
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the perfctr and the IO-APIC seems to work, so use that. */
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if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
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nmi_watchdog = NMI_LOCAL_APIC;
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printk(KERN_INFO
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"Using local APIC NMI watchdog using perfctr0\n");
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} else {
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printk(KERN_INFO "Using IO APIC NMI watchdog\n");
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nmi_watchdog = NMI_IO_APIC;
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}
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}
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/* Why is there no CPUID flag for this? */
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static __init int cpu_has_lapic(void)
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{
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_INTEL:
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case X86_VENDOR_AMD:
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return boot_cpu_data.x86 >= 6;
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/* .... add more cpus here or find a different way to figure this out. */
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default:
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return 0;
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}
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}
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int __init check_nmi_watchdog (void)
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{
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int counts[NR_CPUS];
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int cpu;
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if (nmi_watchdog == NMI_LOCAL_APIC && !cpu_has_lapic()) {
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nmi_watchdog = NMI_NONE;
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return -1;
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}
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printk(KERN_INFO "testing NMI watchdog ... ");
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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counts[cpu] = cpu_pda[cpu].__nmi_count;
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local_irq_enable();
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mdelay((10*1000)/nmi_hz); // wait 10 ticks
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
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#ifdef CONFIG_SMP
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/* Check cpu_callin_map here because that is set
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after the timer is started. */
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if (!cpu_isset(cpu, cpu_callin_map))
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continue;
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#endif
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if (cpu_pda[cpu].__nmi_count - counts[cpu] <= 5) {
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printk("CPU#%d: NMI appears to be stuck (%d)!\n",
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cpu,
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cpu_pda[cpu].__nmi_count);
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nmi_active = 0;
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lapic_nmi_owner &= ~LAPIC_NMI_WATCHDOG;
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return -1;
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}
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}
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printk("OK.\n");
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/* now that we know it works we can reduce NMI frequency to
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something more reasonable; makes a difference in some configs */
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if (nmi_watchdog == NMI_LOCAL_APIC)
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nmi_hz = 1;
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return 0;
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}
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int __init setup_nmi_watchdog(char *str)
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{
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int nmi;
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if (!strncmp(str,"panic",5)) {
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panic_on_timeout = 1;
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str = strchr(str, ',');
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if (!str)
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return 1;
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++str;
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}
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get_option(&str, &nmi);
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if (nmi >= NMI_INVALID)
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return 0;
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nmi_watchdog = nmi;
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return 1;
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}
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__setup("nmi_watchdog=", setup_nmi_watchdog);
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static void disable_lapic_nmi_watchdog(void)
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{
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if (nmi_active <= 0)
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return;
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_AMD:
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wrmsr(MSR_K7_EVNTSEL0, 0, 0);
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break;
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case X86_VENDOR_INTEL:
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wrmsr(MSR_IA32_EVNTSEL0, 0, 0);
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break;
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}
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nmi_active = -1;
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/* tell do_nmi() and others that we're not active any more */
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nmi_watchdog = 0;
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}
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static void enable_lapic_nmi_watchdog(void)
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{
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if (nmi_active < 0) {
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nmi_watchdog = NMI_LOCAL_APIC;
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setup_apic_nmi_watchdog();
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}
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}
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int reserve_lapic_nmi(void)
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{
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unsigned int old_owner;
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spin_lock(&lapic_nmi_owner_lock);
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old_owner = lapic_nmi_owner;
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lapic_nmi_owner |= LAPIC_NMI_RESERVED;
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spin_unlock(&lapic_nmi_owner_lock);
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if (old_owner & LAPIC_NMI_RESERVED)
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return -EBUSY;
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if (old_owner & LAPIC_NMI_WATCHDOG)
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disable_lapic_nmi_watchdog();
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return 0;
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}
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void release_lapic_nmi(void)
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{
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unsigned int new_owner;
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spin_lock(&lapic_nmi_owner_lock);
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new_owner = lapic_nmi_owner & ~LAPIC_NMI_RESERVED;
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lapic_nmi_owner = new_owner;
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spin_unlock(&lapic_nmi_owner_lock);
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if (new_owner & LAPIC_NMI_WATCHDOG)
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enable_lapic_nmi_watchdog();
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}
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void disable_timer_nmi_watchdog(void)
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{
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if ((nmi_watchdog != NMI_IO_APIC) || (nmi_active <= 0))
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return;
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disable_irq(0);
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unset_nmi_callback();
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nmi_active = -1;
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nmi_watchdog = NMI_NONE;
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}
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void enable_timer_nmi_watchdog(void)
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{
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if (nmi_active < 0) {
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nmi_watchdog = NMI_IO_APIC;
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touch_nmi_watchdog();
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nmi_active = 1;
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enable_irq(0);
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}
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}
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#ifdef CONFIG_PM
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static int nmi_pm_active; /* nmi_active before suspend */
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static int lapic_nmi_suspend(struct sys_device *dev, u32 state)
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{
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nmi_pm_active = nmi_active;
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disable_lapic_nmi_watchdog();
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return 0;
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}
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static int lapic_nmi_resume(struct sys_device *dev)
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{
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if (nmi_pm_active > 0)
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enable_lapic_nmi_watchdog();
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return 0;
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}
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static struct sysdev_class nmi_sysclass = {
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set_kset_name("lapic_nmi"),
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.resume = lapic_nmi_resume,
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.suspend = lapic_nmi_suspend,
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};
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static struct sys_device device_lapic_nmi = {
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.id = 0,
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.cls = &nmi_sysclass,
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};
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static int __init init_lapic_nmi_sysfs(void)
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{
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int error;
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if (nmi_active == 0 || nmi_watchdog != NMI_LOCAL_APIC)
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return 0;
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error = sysdev_class_register(&nmi_sysclass);
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if (!error)
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error = sysdev_register(&device_lapic_nmi);
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return error;
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}
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/* must come after the local APIC's device_initcall() */
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late_initcall(init_lapic_nmi_sysfs);
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#endif /* CONFIG_PM */
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/*
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* Activate the NMI watchdog via the local APIC.
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* Original code written by Keith Owens.
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*/
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static void setup_k7_watchdog(void)
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{
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int i;
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unsigned int evntsel;
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/* No check, so can start with slow frequency */
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nmi_hz = 1;
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/* XXX should check these in EFER */
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nmi_perfctr_msr = MSR_K7_PERFCTR0;
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for(i = 0; i < 4; ++i) {
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/* Simulator may not support it */
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if (checking_wrmsrl(MSR_K7_EVNTSEL0+i, 0UL))
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return;
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wrmsrl(MSR_K7_PERFCTR0+i, 0UL);
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}
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evntsel = K7_EVNTSEL_INT
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| K7_EVNTSEL_OS
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| K7_EVNTSEL_USR
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| K7_NMI_EVENT;
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wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
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wrmsrl(MSR_K7_PERFCTR0, -((u64)cpu_khz*1000) / nmi_hz);
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apic_write(APIC_LVTPC, APIC_DM_NMI);
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evntsel |= K7_EVNTSEL_ENABLE;
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wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
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}
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void setup_apic_nmi_watchdog(void)
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{
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_AMD:
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if (boot_cpu_data.x86 < 6)
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return;
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if (strstr(boot_cpu_data.x86_model_id, "Screwdriver"))
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return;
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setup_k7_watchdog();
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break;
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default:
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return;
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}
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lapic_nmi_owner = LAPIC_NMI_WATCHDOG;
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nmi_active = 1;
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}
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/*
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* the best way to detect whether a CPU has a 'hard lockup' problem
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* is to check it's local APIC timer IRQ counts. If they are not
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* changing then that CPU has some problem.
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*
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* as these watchdog NMI IRQs are generated on every CPU, we only
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* have to check the current processor.
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*
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* since NMIs don't listen to _any_ locks, we have to be extremely
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* careful not to rely on unsafe variables. The printk might lock
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* up though, so we have to break up any console locks first ...
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* [when there will be more tty-related locks, break them up
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* here too!]
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*/
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static unsigned int
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last_irq_sums [NR_CPUS],
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alert_counter [NR_CPUS];
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void touch_nmi_watchdog (void)
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{
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int i;
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/*
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* Just reset the alert counters, (other CPUs might be
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* spinning on locks we hold):
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*/
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for (i = 0; i < NR_CPUS; i++)
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alert_counter[i] = 0;
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}
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void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason)
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{
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int sum, cpu;
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cpu = safe_smp_processor_id();
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sum = read_pda(apic_timer_irqs);
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if (last_irq_sums[cpu] == sum) {
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/*
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* Ayiee, looks like this CPU is stuck ...
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* wait a few IRQs (5 seconds) before doing the oops ...
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*/
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alert_counter[cpu]++;
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if (alert_counter[cpu] == 5*nmi_hz) {
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if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
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== NOTIFY_STOP) {
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alert_counter[cpu] = 0;
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return;
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}
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die_nmi("NMI Watchdog detected LOCKUP on CPU%d", regs);
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}
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} else {
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last_irq_sums[cpu] = sum;
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alert_counter[cpu] = 0;
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}
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if (nmi_perfctr_msr)
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wrmsr(nmi_perfctr_msr, -(cpu_khz/nmi_hz*1000), -1);
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}
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static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
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{
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return 0;
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}
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static nmi_callback_t nmi_callback = dummy_nmi_callback;
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asmlinkage void do_nmi(struct pt_regs * regs, long error_code)
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{
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int cpu = safe_smp_processor_id();
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nmi_enter();
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add_pda(__nmi_count,1);
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if (!nmi_callback(regs, cpu))
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default_do_nmi(regs);
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nmi_exit();
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}
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void set_nmi_callback(nmi_callback_t callback)
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{
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nmi_callback = callback;
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}
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void unset_nmi_callback(void)
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{
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nmi_callback = dummy_nmi_callback;
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}
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#ifdef CONFIG_SYSCTL
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static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
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{
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unsigned char reason = get_nmi_reason();
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char buf[64];
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if (!(reason & 0xc0)) {
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sprintf(buf, "NMI received for unknown reason %02x\n", reason);
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die_nmi(buf,regs);
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}
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return 0;
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}
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/*
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* proc handler for /proc/sys/kernel/unknown_nmi_panic
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*/
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int proc_unknown_nmi_panic(struct ctl_table *table, int write, struct file *file,
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void __user *buffer, size_t *length, loff_t *ppos)
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{
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int old_state;
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old_state = unknown_nmi_panic;
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proc_dointvec(table, write, file, buffer, length, ppos);
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if (!!old_state == !!unknown_nmi_panic)
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return 0;
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if (unknown_nmi_panic) {
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if (reserve_lapic_nmi() < 0) {
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unknown_nmi_panic = 0;
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return -EBUSY;
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} else {
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set_nmi_callback(unknown_nmi_panic_callback);
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}
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} else {
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release_lapic_nmi();
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unset_nmi_callback();
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}
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return 0;
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}
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#endif
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EXPORT_SYMBOL(nmi_active);
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EXPORT_SYMBOL(nmi_watchdog);
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EXPORT_SYMBOL(reserve_lapic_nmi);
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EXPORT_SYMBOL(release_lapic_nmi);
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EXPORT_SYMBOL(disable_timer_nmi_watchdog);
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EXPORT_SYMBOL(enable_timer_nmi_watchdog);
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EXPORT_SYMBOL(touch_nmi_watchdog);
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