b481de9ca0
This patch adds the mac80211 based wireless drivers for the Intel PRO/Wireless 3945ABG/BG Network Connection and Intel Wireless WiFi Link AGN (4965) adapters. [ Move driver into it's own directory -DaveM ] Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
337 lines
13 KiB
C
337 lines
13 KiB
C
/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU Geeral Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* James P. Ketrenos <ipw2100-admin@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#ifndef __iwl_eeprom_h__
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#define __iwl_eeprom_h__
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/*
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* This file defines EEPROM related constants, enums, and inline functions.
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*
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*/
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#define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
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#define IWL_EEPROM_ACCESS_DELAY 10 /* uSec */
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/* EEPROM field values */
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#define ANTENNA_SWITCH_NORMAL 0
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#define ANTENNA_SWITCH_INVERSE 1
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enum {
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EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
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EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
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/* Bit 2 Reserved */
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EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
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EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
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EEPROM_CHANNEL_WIDE = (1 << 5),
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EEPROM_CHANNEL_NARROW = (1 << 6),
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EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
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};
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/* EEPROM field lengths */
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#define EEPROM_BOARD_PBA_NUMBER_LENGTH 11
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/* EEPROM field lengths */
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#define EEPROM_BOARD_PBA_NUMBER_LENGTH 11
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#define EEPROM_REGULATORY_SKU_ID_LENGTH 4
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#define EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH 14
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#define EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH 13
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#define EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH 12
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#define EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH 11
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#define EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH 6
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#if IWL == 3945
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#define EEPROM_REGULATORY_CHANNELS_LENGTH ( \
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EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH)
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#elif IWL == 4965
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#define EEPROM_REGULATORY_BAND_24_FAT_CHANNELS_LENGTH 7
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#define EEPROM_REGULATORY_BAND_52_FAT_CHANNELS_LENGTH 11
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#define EEPROM_REGULATORY_CHANNELS_LENGTH ( \
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EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND_24_FAT_CHANNELS_LENGTH + \
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EEPROM_REGULATORY_BAND_52_FAT_CHANNELS_LENGTH)
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#endif
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#define EEPROM_REGULATORY_NUMBER_OF_BANDS 5
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/* SKU Capabilities */
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#define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
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#define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
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#define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7)
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/* *regulatory* channel data from eeprom, one for each channel */
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struct iwl_eeprom_channel {
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u8 flags; /* flags copied from EEPROM */
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s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
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} __attribute__ ((packed));
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/*
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* Mapping of a Tx power level, at factory calibration temperature,
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* to a radio/DSP gain table index.
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* One for each of 5 "sample" power levels in each band.
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* v_det is measured at the factory, using the 3945's built-in power amplifier
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* (PA) output voltage detector. This same detector is used during Tx of
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* long packets in normal operation to provide feedback as to proper output
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* level.
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* Data copied from EEPROM.
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*/
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struct iwl_eeprom_txpower_sample {
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u8 gain_index; /* index into power (gain) setup table ... */
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s8 power; /* ... for this pwr level for this chnl group */
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u16 v_det; /* PA output voltage */
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} __attribute__ ((packed));
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/*
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* Mappings of Tx power levels -> nominal radio/DSP gain table indexes.
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* One for each channel group (a.k.a. "band") (1 for BG, 4 for A).
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* Tx power setup code interpolates between the 5 "sample" power levels
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* to determine the nominal setup for a requested power level.
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* Data copied from EEPROM.
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* DO NOT ALTER THIS STRUCTURE!!!
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*/
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struct iwl_eeprom_txpower_group {
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struct iwl_eeprom_txpower_sample samples[5]; /* 5 power levels */
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s32 a, b, c, d, e; /* coefficients for voltage->power
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* formula (signed) */
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s32 Fa, Fb, Fc, Fd, Fe; /* these modify coeffs based on
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* frequency (signed) */
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s8 saturation_power; /* highest power possible by h/w in this
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* band */
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u8 group_channel; /* "representative" channel # in this band */
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s16 temperature; /* h/w temperature at factory calib this band
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* (signed) */
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} __attribute__ ((packed));
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/*
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* Temperature-based Tx-power compensation data, not band-specific.
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* These coefficients are use to modify a/b/c/d/e coeffs based on
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* difference between current temperature and factory calib temperature.
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* Data copied from EEPROM.
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*/
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struct iwl_eeprom_temperature_corr {
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u32 Ta;
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u32 Tb;
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u32 Tc;
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u32 Td;
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u32 Te;
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} __attribute__ ((packed));
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#if IWL == 4965
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#define EEPROM_TX_POWER_TX_CHAINS (2)
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#define EEPROM_TX_POWER_BANDS (8)
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#define EEPROM_TX_POWER_MEASUREMENTS (3)
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#define EEPROM_TX_POWER_VERSION (2)
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#define EEPROM_TX_POWER_VERSION_NEW (5)
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struct iwl_eeprom_calib_measure {
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u8 temperature;
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u8 gain_idx;
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u8 actual_pow;
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s8 pa_det;
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} __attribute__ ((packed));
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struct iwl_eeprom_calib_ch_info {
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u8 ch_num;
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struct iwl_eeprom_calib_measure measurements[EEPROM_TX_POWER_TX_CHAINS]
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[EEPROM_TX_POWER_MEASUREMENTS];
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} __attribute__ ((packed));
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struct iwl_eeprom_calib_subband_info {
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u8 ch_from;
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u8 ch_to;
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struct iwl_eeprom_calib_ch_info ch1;
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struct iwl_eeprom_calib_ch_info ch2;
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} __attribute__ ((packed));
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struct iwl_eeprom_calib_info {
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u8 saturation_power24;
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u8 saturation_power52;
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s16 voltage; /* signed */
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struct iwl_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS];
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} __attribute__ ((packed));
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#endif
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struct iwl_eeprom {
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u8 reserved0[16];
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#define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
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u16 device_id; /* abs.ofs: 16 */
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u8 reserved1[2];
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#define EEPROM_PMC (2*0x0A) /* 2 bytes */
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u16 pmc; /* abs.ofs: 20 */
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u8 reserved2[20];
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#define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
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u8 mac_address[6]; /* abs.ofs: 42 */
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u8 reserved3[58];
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#define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
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u16 board_revision; /* abs.ofs: 106 */
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u8 reserved4[11];
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#define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
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u8 board_pba_number[9]; /* abs.ofs: 119 */
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u8 reserved5[8];
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#define EEPROM_VERSION (2*0x44) /* 2 bytes */
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u16 version; /* abs.ofs: 136 */
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#define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */
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u8 sku_cap; /* abs.ofs: 138 */
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#define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */
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u8 leds_mode; /* abs.ofs: 139 */
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#define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
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u16 oem_mode;
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#define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
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u16 wowlan_mode; /* abs.ofs: 142 */
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#define EEPROM_LEDS_TIME_INTERVAL (2*0x48) /* 2 bytes */
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u16 leds_time_interval; /* abs.ofs: 144 */
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#define EEPROM_LEDS_OFF_TIME (2*0x49) /* 1 bytes */
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u8 leds_off_time; /* abs.ofs: 146 */
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#define EEPROM_LEDS_ON_TIME (2*0x49+1) /* 1 bytes */
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u8 leds_on_time; /* abs.ofs: 147 */
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#define EEPROM_ALMGOR_M_VERSION (2*0x4A) /* 1 bytes */
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u8 almgor_m_version; /* abs.ofs: 148 */
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#define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */
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u8 antenna_switch_type; /* abs.ofs: 149 */
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#if IWL == 3945
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u8 reserved6[42];
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#else
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u8 reserved6[8];
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#define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
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u16 board_revision_4965; /* abs.ofs: 158 */
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u8 reserved7[13];
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#define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
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u8 board_pba_number_4965[9]; /* abs.ofs: 173 */
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u8 reserved8[10];
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#endif
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#define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
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u8 sku_id[4]; /* abs.ofs: 192 */
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#define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
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u16 band_1_count; /* abs.ofs: 196 */
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#define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
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struct iwl_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */
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#define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
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u16 band_2_count; /* abs.ofs: 226 */
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#define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
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struct iwl_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */
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#define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
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u16 band_3_count; /* abs.ofs: 254 */
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#define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
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struct iwl_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */
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#define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
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u16 band_4_count; /* abs.ofs: 280 */
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#define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
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struct iwl_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */
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#define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
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u16 band_5_count; /* abs.ofs: 304 */
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#define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
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struct iwl_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */
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/* From here on out the EEPROM diverges between the 4965 and the 3945 */
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#if IWL == 3945
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u8 reserved9[194];
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#define EEPROM_TXPOWER_CALIB_GROUP0 0x200
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#define EEPROM_TXPOWER_CALIB_GROUP1 0x240
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#define EEPROM_TXPOWER_CALIB_GROUP2 0x280
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#define EEPROM_TXPOWER_CALIB_GROUP3 0x2c0
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#define EEPROM_TXPOWER_CALIB_GROUP4 0x300
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#define IWL_NUM_TX_CALIB_GROUPS 5
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struct iwl_eeprom_txpower_group groups[IWL_NUM_TX_CALIB_GROUPS];
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/* abs.ofs: 512 */
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#define EEPROM_CALIB_TEMPERATURE_CORRECT 0x340
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struct iwl_eeprom_temperature_corr corrections; /* abs.ofs: 832 */
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u8 reserved16[172]; /* fill out to full 1024 byte block */
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/* 4965AGN adds fat channel support */
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#elif IWL == 4965
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u8 reserved10[2];
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#define EEPROM_REGULATORY_BAND_24_FAT_CHANNELS (2*0xA0) /* 14 bytes */
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struct iwl_eeprom_channel band_24_channels[7]; /* abs.ofs: 320 */
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u8 reserved11[2];
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#define EEPROM_REGULATORY_BAND_52_FAT_CHANNELS (2*0xA8) /* 22 bytes */
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struct iwl_eeprom_channel band_52_channels[11]; /* abs.ofs: 336 */
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u8 reserved12[6];
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#define EEPROM_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
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u16 calib_version; /* abs.ofs: 364 */
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u8 reserved13[2];
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#define EEPROM_SATURATION_POWER_OFFSET (2*0xB8) /* 2 bytes */
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u16 satruation_power; /* abs.ofs: 368 */
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u8 reserved14[94];
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#define EEPROM_IWL_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
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struct iwl_eeprom_calib_info calib_info; /* abs.ofs: 464 */
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u8 reserved16[140]; /* fill out to full 1024 byte block */
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#endif
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} __attribute__ ((packed));
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#define IWL_EEPROM_IMAGE_SIZE 1024
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#endif
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