260a1fd26c
* define new CONFIG_ARCH_MX21 (this one is currently mutually exclusive to CONFIG_ARCH_MX27, but this might change) * splits one header file. Memory definitions, interrupt sources, DMA channels are split into common part, i.MX27 specific and i.MX21 specific. * guard access to UART5/UART6, which don't exist on i.MX21 Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
51 lines
1.5 KiB
C
51 lines
1.5 KiB
C
/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __ASM_ARCH_MXC_H__
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#define __ASM_ARCH_MXC_H__
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#ifndef __ASM_ARCH_MXC_HARDWARE_H__
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#error "Do not include directly."
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#endif
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/* clean up all things that are not used */
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#ifndef CONFIG_ARCH_MX3
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# define cpu_is_mx31() (0)
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#endif
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#ifndef CONFIG_MACH_MX21
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# define cpu_is_mx21() (0)
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#endif
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#ifndef CONFIG_MACH_MX27
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# define cpu_is_mx27() (0)
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#endif
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#ifndef CONFIG_MACH_MX21
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# define cpu_is_mx21() (0)
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#endif
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#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
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#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10)
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#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4)
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#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8)
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#endif
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#endif /* __ASM_ARCH_MXC_H__ */
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