5b3b16880f
These are the rest of the new files needed to add OCTEON processor support to the Linux kernel. Other than Makefile and Kconfig which should be obvious, we have: csrc-octeon.c -- Clock source driver for OCTEON. dma-octeon.c -- Helper functions for mapping DMA memory. flash_setup.c -- Register on-board flash with the MTD subsystem. octeon-irq.c -- OCTEON interrupt controller managment. octeon-memcpy.S -- Optimized memcpy() implementation. serial.c -- Register 8250 platform driver and early console. setup.c -- Early architecture initialization. smp.c -- OCTEON SMP support. octeon_switch.S -- Scheduler context switch for OCTEON. c-octeon.c -- OCTEON cache controller support. cex-oct.S -- OCTEON cache exception handler. asm/mach-cavium-octeon/*.h -- Architecture include files. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/cavium-octeon/Kconfig create mode 100644 arch/mips/cavium-octeon/Makefile create mode 100644 arch/mips/cavium-octeon/csrc-octeon.c create mode 100644 arch/mips/cavium-octeon/dma-octeon.c create mode 100644 arch/mips/cavium-octeon/flash_setup.c create mode 100644 arch/mips/cavium-octeon/octeon-irq.c create mode 100644 arch/mips/cavium-octeon/octeon-memcpy.S create mode 100644 arch/mips/cavium-octeon/serial.c create mode 100644 arch/mips/cavium-octeon/setup.c create mode 100644 arch/mips/cavium-octeon/smp.c create mode 100644 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/irq.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/war.h create mode 100644 arch/mips/include/asm/octeon/octeon.h create mode 100644 arch/mips/kernel/octeon_switch.S create mode 100644 arch/mips/mm/c-octeon.c create mode 100644 arch/mips/mm/cex-oct.S
85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
/*
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* Octeon Bootbus flash setup
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007, 2008 Cavium Networks
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*/
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#include <linux/kernel.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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#include <asm/octeon/octeon.h>
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static struct map_info flash_map;
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static struct mtd_info *mymtd;
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#ifdef CONFIG_MTD_PARTITIONS
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static int nr_parts;
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static struct mtd_partition *parts;
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static const char *part_probe_types[] = {
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"cmdlinepart",
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#ifdef CONFIG_MTD_REDBOOT_PARTS
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"RedBoot",
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#endif
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NULL
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};
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#endif
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/**
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* Module/ driver initialization.
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*
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* Returns Zero on success
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*/
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static int __init flash_init(void)
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{
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/*
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* Read the bootbus region 0 setup to determine the base
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* address of the flash.
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*/
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union cvmx_mio_boot_reg_cfgx region_cfg;
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region_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(0));
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if (region_cfg.s.en) {
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/*
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* The bootloader always takes the flash and sets its
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* address so the entire flash fits below
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* 0x1fc00000. This way the flash aliases to
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* 0x1fc00000 for booting. Software can access the
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* full flash at the true address, while core boot can
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* access 4MB.
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*/
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/* Use this name so old part lines work */
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flash_map.name = "phys_mapped_flash";
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flash_map.phys = region_cfg.s.base << 16;
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flash_map.size = 0x1fc00000 - flash_map.phys;
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flash_map.bankwidth = 1;
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flash_map.virt = ioremap(flash_map.phys, flash_map.size);
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pr_notice("Bootbus flash: Setting flash for %luMB flash at "
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"0x%08lx\n", flash_map.size >> 20, flash_map.phys);
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simple_map_init(&flash_map);
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mymtd = do_map_probe("cfi_probe", &flash_map);
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if (mymtd) {
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mymtd->owner = THIS_MODULE;
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#ifdef CONFIG_MTD_PARTITIONS
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nr_parts = parse_mtd_partitions(mymtd,
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part_probe_types,
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&parts, 0);
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if (nr_parts > 0)
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add_mtd_partitions(mymtd, parts, nr_parts);
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else
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add_mtd_device(mymtd);
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#else
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add_mtd_device(mymtd);
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#endif
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} else {
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pr_err("Failed to register MTD device for flash\n");
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}
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}
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return 0;
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}
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late_initcall(flash_init);
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