bbd9b64e37
This patch moves the following functions to from kvm_main.c to x86.c: emulator_read/write_std, vcpu_find_pervcpu_dev, vcpu_find_mmio_dev, emulator_read/write_emulated, emulator_write_phys, emulator_write_emulated_onepage, emulator_cmpxchg_emulated, get_setment_base, emulate_invlpg, emulate_clts, emulator_get/set_dr, kvm_report_emulation_failure, emulate_instruction The following data type is moved to x86.c: struct x86_emulate_ops emulate_ops Signed-off-by: Carsten Otte <cotte@de.ibm.com> Acked-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
1348 lines
30 KiB
C
1348 lines
30 KiB
C
/*
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* Kernel-based Virtual Machine driver for Linux
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*
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* derived from drivers/kvm/kvm_main.c
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*
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* Copyright (C) 2006 Qumranet, Inc.
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*
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* Authors:
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* Avi Kivity <avi@qumranet.com>
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* Yaniv Kamay <yaniv@qumranet.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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#include "kvm.h"
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#include "x86.h"
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#include "segment_descriptor.h"
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#include "irq.h"
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#include <linux/kvm.h>
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#include <linux/fs.h>
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#include <linux/vmalloc.h>
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#include <linux/module.h>
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#include <asm/uaccess.h>
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#define MAX_IO_MSRS 256
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#define CR0_RESERVED_BITS \
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(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
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| X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
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| X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
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#define CR4_RESERVED_BITS \
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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#define EFER_RESERVED_BITS 0xfffffffffffff2fe
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unsigned long segment_base(u16 selector)
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{
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struct descriptor_table gdt;
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struct segment_descriptor *d;
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unsigned long table_base;
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unsigned long v;
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if (selector == 0)
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return 0;
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asm("sgdt %0" : "=m"(gdt));
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table_base = gdt.base;
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if (selector & 4) { /* from ldt */
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u16 ldt_selector;
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asm("sldt %0" : "=g"(ldt_selector));
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table_base = segment_base(ldt_selector);
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}
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d = (struct segment_descriptor *)(table_base + (selector & ~7));
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v = d->base_low | ((unsigned long)d->base_mid << 16) |
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((unsigned long)d->base_high << 24);
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#ifdef CONFIG_X86_64
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if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
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v |= ((unsigned long) \
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((struct segment_descriptor_64 *)d)->base_higher) << 32;
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#endif
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return v;
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}
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EXPORT_SYMBOL_GPL(segment_base);
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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
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{
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if (irqchip_in_kernel(vcpu->kvm))
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return vcpu->apic_base;
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else
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return vcpu->apic_base;
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}
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EXPORT_SYMBOL_GPL(kvm_get_apic_base);
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void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
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{
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/* TODO: reserve bits check */
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if (irqchip_in_kernel(vcpu->kvm))
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kvm_lapic_set_base(vcpu, data);
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else
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vcpu->apic_base = data;
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}
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EXPORT_SYMBOL_GPL(kvm_set_apic_base);
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static void inject_gp(struct kvm_vcpu *vcpu)
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{
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kvm_x86_ops->inject_gp(vcpu, 0);
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}
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/*
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* Load the pae pdptrs. Return true is they are all valid.
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*/
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int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
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{
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gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
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unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
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int i;
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int ret;
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u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
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mutex_lock(&vcpu->kvm->lock);
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ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
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offset * sizeof(u64), sizeof(pdpte));
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if (ret < 0) {
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ret = 0;
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goto out;
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}
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for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
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if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
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ret = 0;
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goto out;
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}
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}
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ret = 1;
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memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
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out:
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mutex_unlock(&vcpu->kvm->lock);
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return ret;
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}
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void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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{
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if (cr0 & CR0_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
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cr0, vcpu->cr0);
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inject_gp(vcpu);
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return;
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}
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if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
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printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
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inject_gp(vcpu);
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return;
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}
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if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
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printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
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"and a clear PE flag\n");
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inject_gp(vcpu);
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return;
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}
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if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
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#ifdef CONFIG_X86_64
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if ((vcpu->shadow_efer & EFER_LME)) {
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int cs_db, cs_l;
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if (!is_pae(vcpu)) {
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printk(KERN_DEBUG "set_cr0: #GP, start paging "
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"in long mode while PAE is disabled\n");
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inject_gp(vcpu);
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return;
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}
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kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
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if (cs_l) {
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printk(KERN_DEBUG "set_cr0: #GP, start paging "
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"in long mode while CS.L == 1\n");
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inject_gp(vcpu);
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return;
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}
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} else
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#endif
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if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
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printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
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"reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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}
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kvm_x86_ops->set_cr0(vcpu, cr0);
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vcpu->cr0 = cr0;
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mutex_lock(&vcpu->kvm->lock);
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kvm_mmu_reset_context(vcpu);
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mutex_unlock(&vcpu->kvm->lock);
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return;
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}
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EXPORT_SYMBOL_GPL(set_cr0);
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void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
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{
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set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
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}
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EXPORT_SYMBOL_GPL(lmsw);
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void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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{
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if (cr4 & CR4_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (is_long_mode(vcpu)) {
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if (!(cr4 & X86_CR4_PAE)) {
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printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
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"in long mode\n");
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inject_gp(vcpu);
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return;
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}
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} else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
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&& !load_pdptrs(vcpu, vcpu->cr3)) {
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printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (cr4 & X86_CR4_VMXE) {
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printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
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inject_gp(vcpu);
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return;
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}
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kvm_x86_ops->set_cr4(vcpu, cr4);
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vcpu->cr4 = cr4;
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mutex_lock(&vcpu->kvm->lock);
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kvm_mmu_reset_context(vcpu);
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mutex_unlock(&vcpu->kvm->lock);
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}
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EXPORT_SYMBOL_GPL(set_cr4);
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void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
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{
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if (is_long_mode(vcpu)) {
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if (cr3 & CR3_L_MODE_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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} else {
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if (is_pae(vcpu)) {
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if (cr3 & CR3_PAE_RESERVED_BITS) {
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printk(KERN_DEBUG
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"set_cr3: #GP, reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
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printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
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"reserved bits\n");
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inject_gp(vcpu);
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return;
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}
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}
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/*
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* We don't check reserved bits in nonpae mode, because
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* this isn't enforced, and VMware depends on this.
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*/
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}
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mutex_lock(&vcpu->kvm->lock);
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/*
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* Does the new cr3 value map to physical memory? (Note, we
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* catch an invalid cr3 even in real-mode, because it would
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* cause trouble later on when we turn on paging anyway.)
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*
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* A real CPU would silently accept an invalid cr3 and would
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* attempt to use it - with largely undefined (and often hard
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* to debug) behavior on the guest side.
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*/
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if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
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inject_gp(vcpu);
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else {
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vcpu->cr3 = cr3;
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vcpu->mmu.new_cr3(vcpu);
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}
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mutex_unlock(&vcpu->kvm->lock);
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}
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EXPORT_SYMBOL_GPL(set_cr3);
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void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
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{
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if (cr8 & CR8_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
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inject_gp(vcpu);
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return;
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}
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if (irqchip_in_kernel(vcpu->kvm))
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kvm_lapic_set_tpr(vcpu, cr8);
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else
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vcpu->cr8 = cr8;
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}
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EXPORT_SYMBOL_GPL(set_cr8);
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unsigned long get_cr8(struct kvm_vcpu *vcpu)
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{
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if (irqchip_in_kernel(vcpu->kvm))
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return kvm_lapic_get_cr8(vcpu);
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else
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return vcpu->cr8;
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}
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EXPORT_SYMBOL_GPL(get_cr8);
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/*
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* List of msr numbers which we expose to userspace through KVM_GET_MSRS
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* and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
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*
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* This list is modified at module load time to reflect the
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* capabilities of the host cpu.
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*/
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static u32 msrs_to_save[] = {
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MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
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MSR_K6_STAR,
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#ifdef CONFIG_X86_64
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MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
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#endif
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MSR_IA32_TIME_STAMP_COUNTER,
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};
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static unsigned num_msrs_to_save;
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static u32 emulated_msrs[] = {
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MSR_IA32_MISC_ENABLE,
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};
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#ifdef CONFIG_X86_64
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static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
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{
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if (efer & EFER_RESERVED_BITS) {
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printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
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efer);
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inject_gp(vcpu);
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return;
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}
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if (is_paging(vcpu)
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&& (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
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printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
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inject_gp(vcpu);
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return;
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}
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kvm_x86_ops->set_efer(vcpu, efer);
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efer &= ~EFER_LMA;
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efer |= vcpu->shadow_efer & EFER_LMA;
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vcpu->shadow_efer = efer;
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}
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#endif
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/*
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* Writes msr value into into the appropriate "register".
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* Returns 0 on success, non-0 otherwise.
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* Assumes vcpu_load() was already called.
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*/
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int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
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{
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return kvm_x86_ops->set_msr(vcpu, msr_index, data);
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}
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/*
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* Adapt set_msr() to msr_io()'s calling convention
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*/
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static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
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{
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return kvm_set_msr(vcpu, index, *data);
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}
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int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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switch (msr) {
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#ifdef CONFIG_X86_64
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case MSR_EFER:
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set_efer(vcpu, data);
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break;
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#endif
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case MSR_IA32_MC0_STATUS:
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pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
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__FUNCTION__, data);
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break;
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case MSR_IA32_MCG_STATUS:
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pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
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__FUNCTION__, data);
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break;
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case MSR_IA32_UCODE_REV:
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case MSR_IA32_UCODE_WRITE:
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case 0x200 ... 0x2ff: /* MTRRs */
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break;
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case MSR_IA32_APICBASE:
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kvm_set_apic_base(vcpu, data);
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break;
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case MSR_IA32_MISC_ENABLE:
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vcpu->ia32_misc_enable_msr = data;
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break;
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default:
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pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
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return 1;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(kvm_set_msr_common);
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/*
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* Reads an msr value (of 'msr_index') into 'pdata'.
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* Returns 0 on success, non-0 otherwise.
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* Assumes vcpu_load() was already called.
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*/
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int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
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{
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return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
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}
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int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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{
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u64 data;
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switch (msr) {
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case 0xc0010010: /* SYSCFG */
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case 0xc0010015: /* HWCR */
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case MSR_IA32_PLATFORM_ID:
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case MSR_IA32_P5_MC_ADDR:
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case MSR_IA32_P5_MC_TYPE:
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case MSR_IA32_MC0_CTL:
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case MSR_IA32_MCG_STATUS:
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case MSR_IA32_MCG_CAP:
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case MSR_IA32_MC0_MISC:
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case MSR_IA32_MC0_MISC+4:
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case MSR_IA32_MC0_MISC+8:
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case MSR_IA32_MC0_MISC+12:
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case MSR_IA32_MC0_MISC+16:
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case MSR_IA32_UCODE_REV:
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case MSR_IA32_PERF_STATUS:
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case MSR_IA32_EBL_CR_POWERON:
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/* MTRR registers */
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case 0xfe:
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case 0x200 ... 0x2ff:
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data = 0;
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break;
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case 0xcd: /* fsb frequency */
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data = 3;
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break;
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case MSR_IA32_APICBASE:
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data = kvm_get_apic_base(vcpu);
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break;
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case MSR_IA32_MISC_ENABLE:
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data = vcpu->ia32_misc_enable_msr;
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break;
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#ifdef CONFIG_X86_64
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case MSR_EFER:
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data = vcpu->shadow_efer;
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break;
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#endif
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default:
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pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
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return 1;
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}
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*pdata = data;
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return 0;
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}
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EXPORT_SYMBOL_GPL(kvm_get_msr_common);
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/*
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* Read or write a bunch of msrs. All parameters are kernel addresses.
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*
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* @return number of msrs set successfully.
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*/
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static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
|
|
struct kvm_msr_entry *entries,
|
|
int (*do_msr)(struct kvm_vcpu *vcpu,
|
|
unsigned index, u64 *data))
|
|
{
|
|
int i;
|
|
|
|
vcpu_load(vcpu);
|
|
|
|
for (i = 0; i < msrs->nmsrs; ++i)
|
|
if (do_msr(vcpu, entries[i].index, &entries[i].data))
|
|
break;
|
|
|
|
vcpu_put(vcpu);
|
|
|
|
return i;
|
|
}
|
|
|
|
/*
|
|
* Read or write a bunch of msrs. Parameters are user addresses.
|
|
*
|
|
* @return number of msrs set successfully.
|
|
*/
|
|
static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
|
|
int (*do_msr)(struct kvm_vcpu *vcpu,
|
|
unsigned index, u64 *data),
|
|
int writeback)
|
|
{
|
|
struct kvm_msrs msrs;
|
|
struct kvm_msr_entry *entries;
|
|
int r, n;
|
|
unsigned size;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&msrs, user_msrs, sizeof msrs))
|
|
goto out;
|
|
|
|
r = -E2BIG;
|
|
if (msrs.nmsrs >= MAX_IO_MSRS)
|
|
goto out;
|
|
|
|
r = -ENOMEM;
|
|
size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
|
|
entries = vmalloc(size);
|
|
if (!entries)
|
|
goto out;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(entries, user_msrs->entries, size))
|
|
goto out_free;
|
|
|
|
r = n = __msr_io(vcpu, &msrs, entries, do_msr);
|
|
if (r < 0)
|
|
goto out_free;
|
|
|
|
r = -EFAULT;
|
|
if (writeback && copy_to_user(user_msrs->entries, entries, size))
|
|
goto out_free;
|
|
|
|
r = n;
|
|
|
|
out_free:
|
|
vfree(entries);
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
long kvm_arch_dev_ioctl(struct file *filp,
|
|
unsigned int ioctl, unsigned long arg)
|
|
{
|
|
void __user *argp = (void __user *)arg;
|
|
long r;
|
|
|
|
switch (ioctl) {
|
|
case KVM_GET_MSR_INDEX_LIST: {
|
|
struct kvm_msr_list __user *user_msr_list = argp;
|
|
struct kvm_msr_list msr_list;
|
|
unsigned n;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
|
|
goto out;
|
|
n = msr_list.nmsrs;
|
|
msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
|
|
if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
|
|
goto out;
|
|
r = -E2BIG;
|
|
if (n < num_msrs_to_save)
|
|
goto out;
|
|
r = -EFAULT;
|
|
if (copy_to_user(user_msr_list->indices, &msrs_to_save,
|
|
num_msrs_to_save * sizeof(u32)))
|
|
goto out;
|
|
if (copy_to_user(user_msr_list->indices
|
|
+ num_msrs_to_save * sizeof(u32),
|
|
&emulated_msrs,
|
|
ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
|
|
goto out;
|
|
r = 0;
|
|
break;
|
|
}
|
|
default:
|
|
r = -EINVAL;
|
|
}
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
|
|
{
|
|
kvm_x86_ops->vcpu_load(vcpu, cpu);
|
|
}
|
|
|
|
void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
|
|
{
|
|
kvm_x86_ops->vcpu_put(vcpu);
|
|
}
|
|
|
|
static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
|
|
{
|
|
u64 efer;
|
|
int i;
|
|
struct kvm_cpuid_entry *e, *entry;
|
|
|
|
rdmsrl(MSR_EFER, efer);
|
|
entry = NULL;
|
|
for (i = 0; i < vcpu->cpuid_nent; ++i) {
|
|
e = &vcpu->cpuid_entries[i];
|
|
if (e->function == 0x80000001) {
|
|
entry = e;
|
|
break;
|
|
}
|
|
}
|
|
if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
|
|
entry->edx &= ~(1 << 20);
|
|
printk(KERN_INFO "kvm: guest NX capability removed\n");
|
|
}
|
|
}
|
|
|
|
static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
|
|
struct kvm_cpuid *cpuid,
|
|
struct kvm_cpuid_entry __user *entries)
|
|
{
|
|
int r;
|
|
|
|
r = -E2BIG;
|
|
if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
|
|
goto out;
|
|
r = -EFAULT;
|
|
if (copy_from_user(&vcpu->cpuid_entries, entries,
|
|
cpuid->nent * sizeof(struct kvm_cpuid_entry)))
|
|
goto out;
|
|
vcpu->cpuid_nent = cpuid->nent;
|
|
cpuid_fix_nx_cap(vcpu);
|
|
return 0;
|
|
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
|
|
struct kvm_lapic_state *s)
|
|
{
|
|
vcpu_load(vcpu);
|
|
memcpy(s->regs, vcpu->apic->regs, sizeof *s);
|
|
vcpu_put(vcpu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
|
|
struct kvm_lapic_state *s)
|
|
{
|
|
vcpu_load(vcpu);
|
|
memcpy(vcpu->apic->regs, s->regs, sizeof *s);
|
|
kvm_apic_post_state_restore(vcpu);
|
|
vcpu_put(vcpu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
long kvm_arch_vcpu_ioctl(struct file *filp,
|
|
unsigned int ioctl, unsigned long arg)
|
|
{
|
|
struct kvm_vcpu *vcpu = filp->private_data;
|
|
void __user *argp = (void __user *)arg;
|
|
int r;
|
|
|
|
switch (ioctl) {
|
|
case KVM_GET_LAPIC: {
|
|
struct kvm_lapic_state lapic;
|
|
|
|
memset(&lapic, 0, sizeof lapic);
|
|
r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
|
|
if (r)
|
|
goto out;
|
|
r = -EFAULT;
|
|
if (copy_to_user(argp, &lapic, sizeof lapic))
|
|
goto out;
|
|
r = 0;
|
|
break;
|
|
}
|
|
case KVM_SET_LAPIC: {
|
|
struct kvm_lapic_state lapic;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&lapic, argp, sizeof lapic))
|
|
goto out;
|
|
r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
|
|
if (r)
|
|
goto out;
|
|
r = 0;
|
|
break;
|
|
}
|
|
case KVM_SET_CPUID: {
|
|
struct kvm_cpuid __user *cpuid_arg = argp;
|
|
struct kvm_cpuid cpuid;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
|
|
goto out;
|
|
r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
|
|
if (r)
|
|
goto out;
|
|
break;
|
|
}
|
|
case KVM_GET_MSRS:
|
|
r = msr_io(vcpu, argp, kvm_get_msr, 1);
|
|
break;
|
|
case KVM_SET_MSRS:
|
|
r = msr_io(vcpu, argp, do_set_msr, 0);
|
|
break;
|
|
default:
|
|
r = -EINVAL;
|
|
}
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
|
|
{
|
|
int ret;
|
|
|
|
if (addr > (unsigned int)(-3 * PAGE_SIZE))
|
|
return -1;
|
|
ret = kvm_x86_ops->set_tss_addr(kvm, addr);
|
|
return ret;
|
|
}
|
|
|
|
static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
|
|
u32 kvm_nr_mmu_pages)
|
|
{
|
|
if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
|
|
return -EINVAL;
|
|
|
|
mutex_lock(&kvm->lock);
|
|
|
|
kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
|
|
kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
|
|
|
|
mutex_unlock(&kvm->lock);
|
|
return 0;
|
|
}
|
|
|
|
static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
|
|
{
|
|
return kvm->n_alloc_mmu_pages;
|
|
}
|
|
|
|
/*
|
|
* Set a new alias region. Aliases map a portion of physical memory into
|
|
* another portion. This is useful for memory windows, for example the PC
|
|
* VGA region.
|
|
*/
|
|
static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
|
|
struct kvm_memory_alias *alias)
|
|
{
|
|
int r, n;
|
|
struct kvm_mem_alias *p;
|
|
|
|
r = -EINVAL;
|
|
/* General sanity checks */
|
|
if (alias->memory_size & (PAGE_SIZE - 1))
|
|
goto out;
|
|
if (alias->guest_phys_addr & (PAGE_SIZE - 1))
|
|
goto out;
|
|
if (alias->slot >= KVM_ALIAS_SLOTS)
|
|
goto out;
|
|
if (alias->guest_phys_addr + alias->memory_size
|
|
< alias->guest_phys_addr)
|
|
goto out;
|
|
if (alias->target_phys_addr + alias->memory_size
|
|
< alias->target_phys_addr)
|
|
goto out;
|
|
|
|
mutex_lock(&kvm->lock);
|
|
|
|
p = &kvm->aliases[alias->slot];
|
|
p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
|
|
p->npages = alias->memory_size >> PAGE_SHIFT;
|
|
p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
|
|
|
|
for (n = KVM_ALIAS_SLOTS; n > 0; --n)
|
|
if (kvm->aliases[n - 1].npages)
|
|
break;
|
|
kvm->naliases = n;
|
|
|
|
kvm_mmu_zap_all(kvm);
|
|
|
|
mutex_unlock(&kvm->lock);
|
|
|
|
return 0;
|
|
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
|
|
{
|
|
int r;
|
|
|
|
r = 0;
|
|
switch (chip->chip_id) {
|
|
case KVM_IRQCHIP_PIC_MASTER:
|
|
memcpy(&chip->chip.pic,
|
|
&pic_irqchip(kvm)->pics[0],
|
|
sizeof(struct kvm_pic_state));
|
|
break;
|
|
case KVM_IRQCHIP_PIC_SLAVE:
|
|
memcpy(&chip->chip.pic,
|
|
&pic_irqchip(kvm)->pics[1],
|
|
sizeof(struct kvm_pic_state));
|
|
break;
|
|
case KVM_IRQCHIP_IOAPIC:
|
|
memcpy(&chip->chip.ioapic,
|
|
ioapic_irqchip(kvm),
|
|
sizeof(struct kvm_ioapic_state));
|
|
break;
|
|
default:
|
|
r = -EINVAL;
|
|
break;
|
|
}
|
|
return r;
|
|
}
|
|
|
|
static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
|
|
{
|
|
int r;
|
|
|
|
r = 0;
|
|
switch (chip->chip_id) {
|
|
case KVM_IRQCHIP_PIC_MASTER:
|
|
memcpy(&pic_irqchip(kvm)->pics[0],
|
|
&chip->chip.pic,
|
|
sizeof(struct kvm_pic_state));
|
|
break;
|
|
case KVM_IRQCHIP_PIC_SLAVE:
|
|
memcpy(&pic_irqchip(kvm)->pics[1],
|
|
&chip->chip.pic,
|
|
sizeof(struct kvm_pic_state));
|
|
break;
|
|
case KVM_IRQCHIP_IOAPIC:
|
|
memcpy(ioapic_irqchip(kvm),
|
|
&chip->chip.ioapic,
|
|
sizeof(struct kvm_ioapic_state));
|
|
break;
|
|
default:
|
|
r = -EINVAL;
|
|
break;
|
|
}
|
|
kvm_pic_update_irq(pic_irqchip(kvm));
|
|
return r;
|
|
}
|
|
|
|
long kvm_arch_vm_ioctl(struct file *filp,
|
|
unsigned int ioctl, unsigned long arg)
|
|
{
|
|
struct kvm *kvm = filp->private_data;
|
|
void __user *argp = (void __user *)arg;
|
|
int r = -EINVAL;
|
|
|
|
switch (ioctl) {
|
|
case KVM_SET_TSS_ADDR:
|
|
r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
|
|
if (r < 0)
|
|
goto out;
|
|
break;
|
|
case KVM_SET_MEMORY_REGION: {
|
|
struct kvm_memory_region kvm_mem;
|
|
struct kvm_userspace_memory_region kvm_userspace_mem;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
|
|
goto out;
|
|
kvm_userspace_mem.slot = kvm_mem.slot;
|
|
kvm_userspace_mem.flags = kvm_mem.flags;
|
|
kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
|
|
kvm_userspace_mem.memory_size = kvm_mem.memory_size;
|
|
r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
|
|
if (r)
|
|
goto out;
|
|
break;
|
|
}
|
|
case KVM_SET_NR_MMU_PAGES:
|
|
r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
|
|
if (r)
|
|
goto out;
|
|
break;
|
|
case KVM_GET_NR_MMU_PAGES:
|
|
r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
|
|
break;
|
|
case KVM_SET_MEMORY_ALIAS: {
|
|
struct kvm_memory_alias alias;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&alias, argp, sizeof alias))
|
|
goto out;
|
|
r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
|
|
if (r)
|
|
goto out;
|
|
break;
|
|
}
|
|
case KVM_CREATE_IRQCHIP:
|
|
r = -ENOMEM;
|
|
kvm->vpic = kvm_create_pic(kvm);
|
|
if (kvm->vpic) {
|
|
r = kvm_ioapic_init(kvm);
|
|
if (r) {
|
|
kfree(kvm->vpic);
|
|
kvm->vpic = NULL;
|
|
goto out;
|
|
}
|
|
} else
|
|
goto out;
|
|
break;
|
|
case KVM_IRQ_LINE: {
|
|
struct kvm_irq_level irq_event;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&irq_event, argp, sizeof irq_event))
|
|
goto out;
|
|
if (irqchip_in_kernel(kvm)) {
|
|
mutex_lock(&kvm->lock);
|
|
if (irq_event.irq < 16)
|
|
kvm_pic_set_irq(pic_irqchip(kvm),
|
|
irq_event.irq,
|
|
irq_event.level);
|
|
kvm_ioapic_set_irq(kvm->vioapic,
|
|
irq_event.irq,
|
|
irq_event.level);
|
|
mutex_unlock(&kvm->lock);
|
|
r = 0;
|
|
}
|
|
break;
|
|
}
|
|
case KVM_GET_IRQCHIP: {
|
|
/* 0: PIC master, 1: PIC slave, 2: IOAPIC */
|
|
struct kvm_irqchip chip;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&chip, argp, sizeof chip))
|
|
goto out;
|
|
r = -ENXIO;
|
|
if (!irqchip_in_kernel(kvm))
|
|
goto out;
|
|
r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
|
|
if (r)
|
|
goto out;
|
|
r = -EFAULT;
|
|
if (copy_to_user(argp, &chip, sizeof chip))
|
|
goto out;
|
|
r = 0;
|
|
break;
|
|
}
|
|
case KVM_SET_IRQCHIP: {
|
|
/* 0: PIC master, 1: PIC slave, 2: IOAPIC */
|
|
struct kvm_irqchip chip;
|
|
|
|
r = -EFAULT;
|
|
if (copy_from_user(&chip, argp, sizeof chip))
|
|
goto out;
|
|
r = -ENXIO;
|
|
if (!irqchip_in_kernel(kvm))
|
|
goto out;
|
|
r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
|
|
if (r)
|
|
goto out;
|
|
r = 0;
|
|
break;
|
|
}
|
|
default:
|
|
;
|
|
}
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
static __init void kvm_init_msr_list(void)
|
|
{
|
|
u32 dummy[2];
|
|
unsigned i, j;
|
|
|
|
for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
|
|
if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
|
|
continue;
|
|
if (j < i)
|
|
msrs_to_save[j] = msrs_to_save[i];
|
|
j++;
|
|
}
|
|
num_msrs_to_save = j;
|
|
}
|
|
|
|
/*
|
|
* Only apic need an MMIO device hook, so shortcut now..
|
|
*/
|
|
static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
|
|
gpa_t addr)
|
|
{
|
|
struct kvm_io_device *dev;
|
|
|
|
if (vcpu->apic) {
|
|
dev = &vcpu->apic->dev;
|
|
if (dev->in_range(dev, addr))
|
|
return dev;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
|
|
static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
|
|
gpa_t addr)
|
|
{
|
|
struct kvm_io_device *dev;
|
|
|
|
dev = vcpu_find_pervcpu_dev(vcpu, addr);
|
|
if (dev == NULL)
|
|
dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
|
|
return dev;
|
|
}
|
|
|
|
int emulator_read_std(unsigned long addr,
|
|
void *val,
|
|
unsigned int bytes,
|
|
struct kvm_vcpu *vcpu)
|
|
{
|
|
void *data = val;
|
|
|
|
while (bytes) {
|
|
gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
|
|
unsigned offset = addr & (PAGE_SIZE-1);
|
|
unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
|
|
int ret;
|
|
|
|
if (gpa == UNMAPPED_GVA)
|
|
return X86EMUL_PROPAGATE_FAULT;
|
|
ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
|
|
if (ret < 0)
|
|
return X86EMUL_UNHANDLEABLE;
|
|
|
|
bytes -= tocopy;
|
|
data += tocopy;
|
|
addr += tocopy;
|
|
}
|
|
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
EXPORT_SYMBOL_GPL(emulator_read_std);
|
|
|
|
static int emulator_write_std(unsigned long addr,
|
|
const void *val,
|
|
unsigned int bytes,
|
|
struct kvm_vcpu *vcpu)
|
|
{
|
|
pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
|
|
return X86EMUL_UNHANDLEABLE;
|
|
}
|
|
|
|
static int emulator_read_emulated(unsigned long addr,
|
|
void *val,
|
|
unsigned int bytes,
|
|
struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvm_io_device *mmio_dev;
|
|
gpa_t gpa;
|
|
|
|
if (vcpu->mmio_read_completed) {
|
|
memcpy(val, vcpu->mmio_data, bytes);
|
|
vcpu->mmio_read_completed = 0;
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
|
|
gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
|
|
|
|
/* For APIC access vmexit */
|
|
if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
|
|
goto mmio;
|
|
|
|
if (emulator_read_std(addr, val, bytes, vcpu)
|
|
== X86EMUL_CONTINUE)
|
|
return X86EMUL_CONTINUE;
|
|
if (gpa == UNMAPPED_GVA)
|
|
return X86EMUL_PROPAGATE_FAULT;
|
|
|
|
mmio:
|
|
/*
|
|
* Is this MMIO handled locally?
|
|
*/
|
|
mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
|
|
if (mmio_dev) {
|
|
kvm_iodevice_read(mmio_dev, gpa, bytes, val);
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
|
|
vcpu->mmio_needed = 1;
|
|
vcpu->mmio_phys_addr = gpa;
|
|
vcpu->mmio_size = bytes;
|
|
vcpu->mmio_is_write = 0;
|
|
|
|
return X86EMUL_UNHANDLEABLE;
|
|
}
|
|
|
|
static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
|
|
const void *val, int bytes)
|
|
{
|
|
int ret;
|
|
|
|
ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
|
|
if (ret < 0)
|
|
return 0;
|
|
kvm_mmu_pte_write(vcpu, gpa, val, bytes);
|
|
return 1;
|
|
}
|
|
|
|
static int emulator_write_emulated_onepage(unsigned long addr,
|
|
const void *val,
|
|
unsigned int bytes,
|
|
struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvm_io_device *mmio_dev;
|
|
gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
|
|
|
|
if (gpa == UNMAPPED_GVA) {
|
|
kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
|
|
return X86EMUL_PROPAGATE_FAULT;
|
|
}
|
|
|
|
/* For APIC access vmexit */
|
|
if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
|
|
goto mmio;
|
|
|
|
if (emulator_write_phys(vcpu, gpa, val, bytes))
|
|
return X86EMUL_CONTINUE;
|
|
|
|
mmio:
|
|
/*
|
|
* Is this MMIO handled locally?
|
|
*/
|
|
mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
|
|
if (mmio_dev) {
|
|
kvm_iodevice_write(mmio_dev, gpa, bytes, val);
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
|
|
vcpu->mmio_needed = 1;
|
|
vcpu->mmio_phys_addr = gpa;
|
|
vcpu->mmio_size = bytes;
|
|
vcpu->mmio_is_write = 1;
|
|
memcpy(vcpu->mmio_data, val, bytes);
|
|
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
|
|
int emulator_write_emulated(unsigned long addr,
|
|
const void *val,
|
|
unsigned int bytes,
|
|
struct kvm_vcpu *vcpu)
|
|
{
|
|
/* Crossing a page boundary? */
|
|
if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
|
|
int rc, now;
|
|
|
|
now = -addr & ~PAGE_MASK;
|
|
rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
|
|
if (rc != X86EMUL_CONTINUE)
|
|
return rc;
|
|
addr += now;
|
|
val += now;
|
|
bytes -= now;
|
|
}
|
|
return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
|
|
}
|
|
EXPORT_SYMBOL_GPL(emulator_write_emulated);
|
|
|
|
static int emulator_cmpxchg_emulated(unsigned long addr,
|
|
const void *old,
|
|
const void *new,
|
|
unsigned int bytes,
|
|
struct kvm_vcpu *vcpu)
|
|
{
|
|
static int reported;
|
|
|
|
if (!reported) {
|
|
reported = 1;
|
|
printk(KERN_WARNING "kvm: emulating exchange as write\n");
|
|
}
|
|
return emulator_write_emulated(addr, new, bytes, vcpu);
|
|
}
|
|
|
|
static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
|
|
{
|
|
return kvm_x86_ops->get_segment_base(vcpu, seg);
|
|
}
|
|
|
|
int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
|
|
{
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
|
|
int emulate_clts(struct kvm_vcpu *vcpu)
|
|
{
|
|
kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
|
|
int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
|
|
{
|
|
struct kvm_vcpu *vcpu = ctxt->vcpu;
|
|
|
|
switch (dr) {
|
|
case 0 ... 3:
|
|
*dest = kvm_x86_ops->get_dr(vcpu, dr);
|
|
return X86EMUL_CONTINUE;
|
|
default:
|
|
pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
|
|
return X86EMUL_UNHANDLEABLE;
|
|
}
|
|
}
|
|
|
|
int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
|
|
{
|
|
unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
|
|
int exception;
|
|
|
|
kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
|
|
if (exception) {
|
|
/* FIXME: better handling */
|
|
return X86EMUL_UNHANDLEABLE;
|
|
}
|
|
return X86EMUL_CONTINUE;
|
|
}
|
|
|
|
void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
|
|
{
|
|
static int reported;
|
|
u8 opcodes[4];
|
|
unsigned long rip = vcpu->rip;
|
|
unsigned long rip_linear;
|
|
|
|
rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
|
|
|
|
if (reported)
|
|
return;
|
|
|
|
emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
|
|
|
|
printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
|
|
context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
|
|
reported = 1;
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
|
|
|
|
struct x86_emulate_ops emulate_ops = {
|
|
.read_std = emulator_read_std,
|
|
.write_std = emulator_write_std,
|
|
.read_emulated = emulator_read_emulated,
|
|
.write_emulated = emulator_write_emulated,
|
|
.cmpxchg_emulated = emulator_cmpxchg_emulated,
|
|
};
|
|
|
|
int emulate_instruction(struct kvm_vcpu *vcpu,
|
|
struct kvm_run *run,
|
|
unsigned long cr2,
|
|
u16 error_code,
|
|
int no_decode)
|
|
{
|
|
int r;
|
|
|
|
vcpu->mmio_fault_cr2 = cr2;
|
|
kvm_x86_ops->cache_regs(vcpu);
|
|
|
|
vcpu->mmio_is_write = 0;
|
|
vcpu->pio.string = 0;
|
|
|
|
if (!no_decode) {
|
|
int cs_db, cs_l;
|
|
kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
|
|
|
|
vcpu->emulate_ctxt.vcpu = vcpu;
|
|
vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
|
|
vcpu->emulate_ctxt.cr2 = cr2;
|
|
vcpu->emulate_ctxt.mode =
|
|
(vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
|
|
? X86EMUL_MODE_REAL : cs_l
|
|
? X86EMUL_MODE_PROT64 : cs_db
|
|
? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
|
|
|
|
if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
|
|
vcpu->emulate_ctxt.cs_base = 0;
|
|
vcpu->emulate_ctxt.ds_base = 0;
|
|
vcpu->emulate_ctxt.es_base = 0;
|
|
vcpu->emulate_ctxt.ss_base = 0;
|
|
} else {
|
|
vcpu->emulate_ctxt.cs_base =
|
|
get_segment_base(vcpu, VCPU_SREG_CS);
|
|
vcpu->emulate_ctxt.ds_base =
|
|
get_segment_base(vcpu, VCPU_SREG_DS);
|
|
vcpu->emulate_ctxt.es_base =
|
|
get_segment_base(vcpu, VCPU_SREG_ES);
|
|
vcpu->emulate_ctxt.ss_base =
|
|
get_segment_base(vcpu, VCPU_SREG_SS);
|
|
}
|
|
|
|
vcpu->emulate_ctxt.gs_base =
|
|
get_segment_base(vcpu, VCPU_SREG_GS);
|
|
vcpu->emulate_ctxt.fs_base =
|
|
get_segment_base(vcpu, VCPU_SREG_FS);
|
|
|
|
r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
|
|
if (r) {
|
|
if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
|
|
return EMULATE_DONE;
|
|
return EMULATE_FAIL;
|
|
}
|
|
}
|
|
|
|
r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
|
|
|
|
if (vcpu->pio.string)
|
|
return EMULATE_DO_MMIO;
|
|
|
|
if ((r || vcpu->mmio_is_write) && run) {
|
|
run->exit_reason = KVM_EXIT_MMIO;
|
|
run->mmio.phys_addr = vcpu->mmio_phys_addr;
|
|
memcpy(run->mmio.data, vcpu->mmio_data, 8);
|
|
run->mmio.len = vcpu->mmio_size;
|
|
run->mmio.is_write = vcpu->mmio_is_write;
|
|
}
|
|
|
|
if (r) {
|
|
if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
|
|
return EMULATE_DONE;
|
|
if (!vcpu->mmio_needed) {
|
|
kvm_report_emulation_failure(vcpu, "mmio");
|
|
return EMULATE_FAIL;
|
|
}
|
|
return EMULATE_DO_MMIO;
|
|
}
|
|
|
|
kvm_x86_ops->decache_regs(vcpu);
|
|
kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
|
|
|
|
if (vcpu->mmio_is_write) {
|
|
vcpu->mmio_needed = 0;
|
|
return EMULATE_DO_MMIO;
|
|
}
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
EXPORT_SYMBOL_GPL(emulate_instruction);
|
|
|
|
__init void kvm_arch_init(void)
|
|
{
|
|
kvm_init_msr_list();
|
|
}
|