d2a28ad9fa
Memory errors encountered by user applications may surface when the CPU is running in kernel context. The current code will not attempt recovery if the MCA surfaces in kernel context (privilage mode 0). This patch adds a check for cases where the user initiated the load that surfaces in kernel interrupt code. An example is a user process lauching a load from memory and the data in memory had bad ECC. Before the bad data gets to the CPU register, and interrupt comes in. The code jumps to the IVT interrupt entry point and begins execution in kernel context. The process of saving the user registers (SAVE_REST) causes the bad data to be loaded into a CPU register, triggering the MCA. The MCA surfaces in kernel context, even though the load was initiated from user context. As suggested by David and Tony, this patch uses an exception table like approach, puting the tagged recovery addresses in a searchable table. One difference from the exception table is that MCAs do not surface in precise places (such as with a TLB miss), so instead of tagging specific instructions, address ranges are registers. A single macro is used to do the tagging, with the input parameter being the label of the starting address and the macro being the ending address. This limits clutter in the code. This patch only tags one spot, the interrupt ivt entry. Testing showed that spot to be a "heavy hitter" with MCAs surfacing while saving user registers. Other spots can be added as needed by adding a single macro. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
121 lines
4.5 KiB
C
121 lines
4.5 KiB
C
/*
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* File: mca_drv.h
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* Purpose: Define helpers for Generic MCA handling
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*
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* Copyright (C) 2004 FUJITSU LIMITED
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* Copyright (C) Hidetoshi Seto (seto.hidetoshi@jp.fujitsu.com)
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*/
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/*
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* Processor error section:
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*
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* +-sal_log_processor_info_t *info-------------+
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* | sal_log_section_hdr_t header; |
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* | ... |
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* | sal_log_mod_error_info_t info[0]; |
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* +-+----------------+-------------------------+
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* | CACHE_CHECK | ^ num_cache_check v
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* +----------------+
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* | TLB_CHECK | ^ num_tlb_check v
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* +----------------+
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* | BUS_CHECK | ^ num_bus_check v
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* +----------------+
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* | REG_FILE_CHECK | ^ num_reg_file_check v
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* +----------------+
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* | MS_CHECK | ^ num_ms_check v
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* +-struct cpuid_info *id----------------------+
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* | regs[5]; |
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* | reserved; |
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* +-sal_processor_static_info_t *regs----------+
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* | valid; |
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* | ... |
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* | fr[128]; |
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* +--------------------------------------------+
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*/
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/* peidx: index of processor error section */
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typedef struct peidx_table {
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sal_log_processor_info_t *info;
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struct sal_cpuid_info *id;
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sal_processor_static_info_t *regs;
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} peidx_table_t;
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#define peidx_head(p) (((p)->info))
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#define peidx_mid(p) (((p)->id))
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#define peidx_bottom(p) (((p)->regs))
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#define peidx_psp(p) (&(peidx_head(p)->proc_state_parameter))
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#define peidx_field_valid(p) (&(peidx_head(p)->valid))
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#define peidx_minstate_area(p) (&(peidx_bottom(p)->min_state_area))
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#define peidx_cache_check_num(p) (peidx_head(p)->valid.num_cache_check)
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#define peidx_tlb_check_num(p) (peidx_head(p)->valid.num_tlb_check)
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#define peidx_bus_check_num(p) (peidx_head(p)->valid.num_bus_check)
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#define peidx_reg_file_check_num(p) (peidx_head(p)->valid.num_reg_file_check)
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#define peidx_ms_check_num(p) (peidx_head(p)->valid.num_ms_check)
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#define peidx_cache_check_idx(p, n) (n)
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#define peidx_tlb_check_idx(p, n) (peidx_cache_check_idx(p, peidx_cache_check_num(p)) + n)
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#define peidx_bus_check_idx(p, n) (peidx_tlb_check_idx(p, peidx_tlb_check_num(p)) + n)
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#define peidx_reg_file_check_idx(p, n) (peidx_bus_check_idx(p, peidx_bus_check_num(p)) + n)
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#define peidx_ms_check_idx(p, n) (peidx_reg_file_check_idx(p, peidx_reg_file_check_num(p)) + n)
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#define peidx_mod_error_info(p, name, n) \
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({ int __idx = peidx_##name##_idx(p, n); \
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sal_log_mod_error_info_t *__ret = NULL; \
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if (peidx_##name##_num(p) > n) /*BUG*/ \
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__ret = &(peidx_head(p)->info[__idx]); \
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__ret; })
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#define peidx_cache_check(p, n) peidx_mod_error_info(p, cache_check, n)
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#define peidx_tlb_check(p, n) peidx_mod_error_info(p, tlb_check, n)
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#define peidx_bus_check(p, n) peidx_mod_error_info(p, bus_check, n)
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#define peidx_reg_file_check(p, n) peidx_mod_error_info(p, reg_file_check, n)
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#define peidx_ms_check(p, n) peidx_mod_error_info(p, ms_check, n)
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#define peidx_check_info(proc, name, n) \
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({ \
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sal_log_mod_error_info_t *__info = peidx_mod_error_info(proc, name, n);\
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u64 __temp = __info && __info->valid.check_info \
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? __info->check_info : 0; \
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__temp; })
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/* slidx: index of SAL log error record */
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typedef struct slidx_list {
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struct list_head list;
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sal_log_section_hdr_t *hdr;
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} slidx_list_t;
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typedef struct slidx_table {
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sal_log_record_header_t *header;
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int n_sections; /* # of section headers */
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struct list_head proc_err;
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struct list_head mem_dev_err;
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struct list_head sel_dev_err;
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struct list_head pci_bus_err;
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struct list_head smbios_dev_err;
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struct list_head pci_comp_err;
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struct list_head plat_specific_err;
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struct list_head host_ctlr_err;
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struct list_head plat_bus_err;
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struct list_head unsupported; /* list of unsupported sections */
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} slidx_table_t;
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#define slidx_foreach_entry(pos, head) \
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list_for_each_entry(pos, head, list)
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#define slidx_first_entry(head) \
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(((head)->next != (head)) ? list_entry((head)->next, typeof(slidx_list_t), list) : NULL)
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#define slidx_count(slidx, sec) \
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({ int __count = 0; \
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slidx_list_t *__pos; \
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slidx_foreach_entry(__pos, &((slidx)->sec)) { __count++; }\
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__count; })
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struct mca_table_entry {
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int start_addr; /* location-relative starting address of MCA recoverable range */
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int end_addr; /* location-relative ending address of MCA recoverable range */
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};
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extern const struct mca_table_entry *search_mca_tables (unsigned long addr);
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extern int mca_recover_range(unsigned long);
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