Nirav Shah eaa8a1fefd qcacld-3.0: Enable Shadow register from PCIe block in QCN7605 ... QCN7605 has 2 set of shadow registers, WCSS block and PCIe block. As PCIe shadow register are at power domain boundary, enabling PCIe shadow register for QCN7605. Also PCIe shadow register falls below 512KB, no need to use register windowing which is required to get it access from IPA FW. Change-Id: Ic0bbc2de4c3e32c4fb6453d273f0f29d19f3537c CRs-Fixed: 2623851		2020-02-21 03:13:38 -08:00
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default_defconfig	qcacld-3.0: Clear CONFIG_CLD_HL_SDIO_CORE	2020-02-19 23:40:19 -08:00
genoa.common	qcacld-3.0: Enable Shadow register from PCIe block in QCN7605	2020-02-21 03:13:38 -08:00
genoa.pci.debug_defconfig	qcacld-3.0: Enable mib stats in genoa	2020-01-02 06:43:33 -08:00
genoa.pci.perf_defconfig	qcacld-3.0: Enable CONFIG_AR900B for Genoa	2019-06-15 00:26:11 -07:00
genoa.sdio.debug_defconfig	qcacld-3.0: Make tx resource hi/low threshold configurable	2019-11-05 09:26:45 -08:00
genoa.sdio.perf_defconfig	qcacld-3.0: Make tx resource hi/low threshold configurable	2019-11-05 09:26:45 -08:00
genoa.snoc.debug_defconfig	qcacld-3.0: Enable CONFIG_AR900B for Genoa	2019-06-15 00:26:11 -07:00
genoa.snoc.perf_defconfig	qcacld-3.0: Enable CONFIG_AR900B for Genoa	2019-06-15 00:26:11 -07:00
genoa.usb.debug_defconfig	qcacld-3.0: Add logic to bundle packets for HL	2019-12-01 17:40:55 -08:00
genoa.usb.perf_defconfig	qcacld-3.0: Add credit tracking for HL Data Path	2019-12-13 07:03:11 -08:00
qca6174_defconfig	qcacld-3.0: Unknown symbol wlan_set_vdev_crypto_prarams_from_ie	2020-01-08 15:46:44 -08:00
qca6390_defconfig	qcacld-3.0: Unknown symbol wlan_set_vdev_crypto_prarams_from_ie	2020-01-08 15:46:44 -08:00
qcn7605_defconfig	qcacld-3.0: Add genoa defconfig for multiple ko support	2019-05-23 09:30:41 -07:00
qcs40x.snoc.perf_defconfig	qcacld-3.0: Enable FTM time sync feature	2020-02-04 17:18:10 -08:00
whunt_defconfig	qcacld-3.0: Disable PM_QOS feature in WHUNT config	2020-01-29 06:01:15 -08:00