f15cbe6f1a
This follows the sparc changes a439fe51a1.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
100 lines
1.6 KiB
C
100 lines
1.6 KiB
C
#ifndef __ASM_SH_IRQFLAGS_32_H
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#define __ASM_SH_IRQFLAGS_32_H
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static inline void raw_local_irq_enable(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and %1, %0\n\t"
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#ifdef CONFIG_CPU_HAS_SR_RB
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"stc r6_bank, %1\n\t"
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"or %1, %0\n\t"
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#endif
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "1" (~0x000000f0)
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: "memory"
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);
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}
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static inline void raw_local_irq_disable(void)
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{
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unsigned long flags;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"or #0xf0, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&z" (flags)
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: /* no inputs */
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: "memory"
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);
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}
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static inline void set_bl_bit(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"or %2, %0\n\t"
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"and %3, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "r" (0x10000000), "r" (0xffffff0f)
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: "memory"
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);
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}
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static inline void clear_bl_bit(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and %2, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "1" (~0x10000000)
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: "memory"
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);
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}
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static inline unsigned long __raw_local_save_flags(void)
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{
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unsigned long flags;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and #0xf0, %0\n\t"
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: "=&z" (flags)
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: /* no inputs */
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: "memory"
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);
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return flags;
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}
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static inline unsigned long __raw_local_irq_save(void)
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{
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unsigned long flags, __dummy;
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__asm__ __volatile__ (
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"stc sr, %1\n\t"
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"mov %1, %0\n\t"
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"or #0xf0, %0\n\t"
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"ldc %0, sr\n\t"
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"mov %1, %0\n\t"
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"and #0xf0, %0\n\t"
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: "=&z" (flags), "=&r" (__dummy)
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: /* no inputs */
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: "memory"
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);
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return flags;
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}
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#endif /* __ASM_SH_IRQFLAGS_32_H */
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