305 lines
6.4 KiB
C
305 lines
6.4 KiB
C
/*
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* Copyright 2007-2008 Nouveau Project
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __NOUVEAU_BIOS_H__
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#define __NOUVEAU_BIOS_H__
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#include "nvreg.h"
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#include "nouveau_i2c.h"
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#define DCB_MAX_NUM_ENTRIES 16
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#define DCB_MAX_NUM_I2C_ENTRIES 16
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#define DCB_MAX_NUM_GPIO_ENTRIES 32
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#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
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#define DCB_LOC_ON_CHIP 0
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struct dcb_i2c_entry {
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uint32_t entry;
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uint8_t port_type;
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uint8_t read, write;
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struct nouveau_i2c_chan *chan;
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};
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enum dcb_gpio_tag {
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DCB_GPIO_TVDAC0 = 0xc,
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DCB_GPIO_TVDAC1 = 0x2d,
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};
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struct dcb_gpio_entry {
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enum dcb_gpio_tag tag;
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int line;
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bool invert;
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uint32_t entry;
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uint8_t state_default;
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uint8_t state[2];
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};
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struct dcb_gpio_table {
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int entries;
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struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
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};
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enum dcb_connector_type {
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DCB_CONNECTOR_VGA = 0x00,
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DCB_CONNECTOR_TV_0 = 0x10,
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DCB_CONNECTOR_TV_1 = 0x11,
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DCB_CONNECTOR_TV_3 = 0x13,
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DCB_CONNECTOR_DVI_I = 0x30,
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DCB_CONNECTOR_DVI_D = 0x31,
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DCB_CONNECTOR_LVDS = 0x40,
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DCB_CONNECTOR_DP = 0x46,
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DCB_CONNECTOR_eDP = 0x47,
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DCB_CONNECTOR_HDMI_0 = 0x60,
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DCB_CONNECTOR_HDMI_1 = 0x61,
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DCB_CONNECTOR_NONE = 0xff
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};
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struct dcb_connector_table_entry {
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uint8_t index;
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uint32_t entry;
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enum dcb_connector_type type;
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uint8_t index2;
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uint8_t gpio_tag;
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void *drm;
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};
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struct dcb_connector_table {
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int entries;
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struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
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};
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enum dcb_type {
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OUTPUT_ANALOG = 0,
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OUTPUT_TV = 1,
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OUTPUT_TMDS = 2,
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OUTPUT_LVDS = 3,
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OUTPUT_DP = 6,
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OUTPUT_EOL = 14, /* DCB 4.0+, appears to be end-of-list */
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OUTPUT_ANY = -1
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};
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struct dcb_entry {
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int index; /* may not be raw dcb index if merging has happened */
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enum dcb_type type;
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uint8_t i2c_index;
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uint8_t heads;
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uint8_t connector;
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uint8_t bus;
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uint8_t location;
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uint8_t or;
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bool duallink_possible;
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union {
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struct sor_conf {
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int link;
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} sorconf;
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struct {
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int maxfreq;
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} crtconf;
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struct {
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struct sor_conf sor;
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bool use_straps_for_mode;
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bool use_acpi_for_edid;
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bool use_power_scripts;
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} lvdsconf;
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struct {
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bool has_component_output;
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} tvconf;
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struct {
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struct sor_conf sor;
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int link_nr;
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int link_bw;
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} dpconf;
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struct {
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struct sor_conf sor;
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int slave_addr;
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} tmdsconf;
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};
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bool i2c_upper_default;
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};
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struct dcb_table {
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uint8_t version;
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int entries;
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struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
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uint8_t *i2c_table;
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uint8_t i2c_default_indices;
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struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];
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uint16_t gpio_table_ptr;
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struct dcb_gpio_table gpio;
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uint16_t connector_table_ptr;
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struct dcb_connector_table connector;
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};
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enum nouveau_or {
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OUTPUT_A = (1 << 0),
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OUTPUT_B = (1 << 1),
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OUTPUT_C = (1 << 2)
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};
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enum LVDS_script {
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/* Order *does* matter here */
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LVDS_INIT = 1,
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LVDS_RESET,
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LVDS_BACKLIGHT_ON,
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LVDS_BACKLIGHT_OFF,
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LVDS_PANEL_ON,
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LVDS_PANEL_OFF
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};
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/* changing these requires matching changes to reg tables in nv_get_clock */
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#define MAX_PLL_TYPES 4
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enum pll_types {
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NVPLL,
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MPLL,
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VPLL1,
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VPLL2
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};
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struct pll_lims {
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struct {
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int minfreq;
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int maxfreq;
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int min_inputfreq;
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int max_inputfreq;
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uint8_t min_m;
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uint8_t max_m;
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uint8_t min_n;
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uint8_t max_n;
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} vco1, vco2;
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uint8_t max_log2p;
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/*
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* for most pre nv50 cards setting a log2P of 7 (the common max_log2p
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* value) is no different to 6 (at least for vplls) so allowing the MNP
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* calc to use 7 causes the generated clock to be out by a factor of 2.
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* however, max_log2p cannot be fixed-up during parsing as the
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* unmodified max_log2p value is still needed for setting mplls, hence
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* an additional max_usable_log2p member
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*/
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uint8_t max_usable_log2p;
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uint8_t log2p_bias;
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uint8_t min_p;
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uint8_t max_p;
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int refclk;
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};
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struct nvbios {
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struct drm_device *dev;
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uint8_t chip_version;
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uint32_t dactestval;
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uint32_t tvdactestval;
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uint8_t digital_min_front_porch;
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bool fp_no_ddc;
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struct mutex lock;
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uint8_t data[NV_PROM_SIZE];
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unsigned int length;
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bool execute;
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uint8_t major_version;
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uint8_t feature_byte;
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bool is_mobile;
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uint32_t fmaxvco, fminvco;
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bool old_style_init;
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uint16_t init_script_tbls_ptr;
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uint16_t extra_init_script_tbl_ptr;
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uint16_t macro_index_tbl_ptr;
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uint16_t macro_tbl_ptr;
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uint16_t condition_tbl_ptr;
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uint16_t io_condition_tbl_ptr;
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uint16_t io_flag_condition_tbl_ptr;
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uint16_t init_function_tbl_ptr;
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uint16_t pll_limit_tbl_ptr;
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uint16_t ram_restrict_tbl_ptr;
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uint8_t ram_restrict_group_count;
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uint16_t some_script_ptr; /* BIT I + 14 */
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uint16_t init96_tbl_ptr; /* BIT I + 16 */
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struct dcb_table dcb;
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struct {
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int crtchead;
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} state;
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struct {
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struct dcb_entry *output;
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uint16_t script_table_ptr;
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uint16_t dp_table_ptr;
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} display;
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struct {
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uint16_t fptablepointer; /* also used by tmds */
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uint16_t fpxlatetableptr;
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int xlatwidth;
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uint16_t lvdsmanufacturerpointer;
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uint16_t fpxlatemanufacturertableptr;
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uint16_t mode_ptr;
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uint16_t xlated_entry;
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bool power_off_for_reset;
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bool reset_after_pclk_change;
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bool dual_link;
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bool link_c_increment;
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bool if_is_24bit;
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int duallink_transition_clk;
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uint8_t strapless_is_24bit;
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uint8_t *edid;
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/* will need resetting after suspend */
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int last_script_invoc;
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bool lvds_init_run;
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} fp;
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struct {
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uint16_t output0_script_ptr;
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uint16_t output1_script_ptr;
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} tmds;
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struct {
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uint16_t mem_init_tbl_ptr;
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uint16_t sdr_seq_tbl_ptr;
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uint16_t ddr_seq_tbl_ptr;
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struct {
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uint8_t crt, tv, panel;
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} i2c_indices;
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uint16_t lvds_single_a_script_ptr;
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} legacy;
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};
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#endif
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