c3a9c7f53a
This patch add support for NOR flash mapping through the physmap driver. The purpose is to maintain the original Atmark partition model. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
343 lines
8.1 KiB
C
343 lines
8.1 KiB
C
/*
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* armadillo5x0.c
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*
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* Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
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* updates in http://alberdroid.blogspot.com/
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*
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* Based on Atmark Techno, Inc. armadillo 500 BSP 2008
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* Based on mx31ads.c and pcm037.c Great Work!
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/smsc911x.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/memory.h>
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#include <asm/mach/map.h>
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#include <mach/common.h>
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#include <mach/imx-uart.h>
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#include <mach/iomux-mx3.h>
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#include <mach/board-armadillo5x0.h>
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#include <mach/mmc.h>
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#include <mach/ipu.h>
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#include <mach/mx3fb.h>
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#include "devices.h"
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static int armadillo5x0_pins[] = {
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/* UART1 */
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MX31_PIN_CTS1__CTS1,
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MX31_PIN_RTS1__RTS1,
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MX31_PIN_TXD1__TXD1,
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MX31_PIN_RXD1__RXD1,
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/* UART2 */
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MX31_PIN_CTS2__CTS2,
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MX31_PIN_RTS2__RTS2,
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MX31_PIN_TXD2__TXD2,
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MX31_PIN_RXD2__RXD2,
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/* LAN9118_IRQ */
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IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
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/* SDHC1 */
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MX31_PIN_SD1_DATA3__SD1_DATA3,
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MX31_PIN_SD1_DATA2__SD1_DATA2,
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MX31_PIN_SD1_DATA1__SD1_DATA1,
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MX31_PIN_SD1_DATA0__SD1_DATA0,
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MX31_PIN_SD1_CLK__SD1_CLK,
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MX31_PIN_SD1_CMD__SD1_CMD,
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/* Framebuffer */
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MX31_PIN_LD0__LD0,
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MX31_PIN_LD1__LD1,
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MX31_PIN_LD2__LD2,
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MX31_PIN_LD3__LD3,
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MX31_PIN_LD4__LD4,
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MX31_PIN_LD5__LD5,
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MX31_PIN_LD6__LD6,
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MX31_PIN_LD7__LD7,
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MX31_PIN_LD8__LD8,
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MX31_PIN_LD9__LD9,
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MX31_PIN_LD10__LD10,
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MX31_PIN_LD11__LD11,
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MX31_PIN_LD12__LD12,
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MX31_PIN_LD13__LD13,
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MX31_PIN_LD14__LD14,
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MX31_PIN_LD15__LD15,
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MX31_PIN_LD16__LD16,
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MX31_PIN_LD17__LD17,
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MX31_PIN_VSYNC3__VSYNC3,
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MX31_PIN_HSYNC__HSYNC,
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MX31_PIN_FPSHIFT__FPSHIFT,
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MX31_PIN_DRDY0__DRDY0,
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IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
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};
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/*
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* MTD NOR Flash
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*/
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static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
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{
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.name = "nor.bootloader",
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.offset = 0x00000000,
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.size = 4*32*1024,
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}, {
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.name = "nor.kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 16*128*1024,
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}, {
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.name = "nor.userland",
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.offset = MTDPART_OFS_APPEND,
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.size = 110*128*1024,
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}, {
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.name = "nor.config",
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.offset = MTDPART_OFS_APPEND,
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.size = 1*128*1024,
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},
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};
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static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
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.width = 2,
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.parts = armadillo5x0_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
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};
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static struct resource armadillo5x0_nor_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = CS0_BASE_ADDR,
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.end = CS0_BASE_ADDR + SZ_64M - 1,
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};
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static struct platform_device armadillo5x0_nor_flash = {
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.name = "physmap-flash",
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.id = -1,
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.num_resources = 1,
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.resource = &armadillo5x0_nor_flash_resource,
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};
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/*
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* FB support
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*/
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static const struct fb_videomode fb_modedb[] = {
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{ /* 640x480 @ 60 Hz */
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.name = "CRT-VGA",
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.refresh = 60,
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.xres = 640,
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.yres = 480,
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.pixclock = 39721,
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.left_margin = 35,
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.right_margin = 115,
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.upper_margin = 43,
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.lower_margin = 1,
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.hsync_len = 10,
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.vsync_len = 1,
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.sync = FB_SYNC_OE_ACT_HIGH,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = 0,
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}, {/* 800x600 @ 56 Hz */
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.name = "CRT-SVGA",
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.refresh = 56,
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.xres = 800,
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.yres = 600,
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.pixclock = 30000,
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.left_margin = 30,
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.right_margin = 108,
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.upper_margin = 13,
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.lower_margin = 10,
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.hsync_len = 10,
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.vsync_len = 1,
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.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
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FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = 0,
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},
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};
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static struct ipu_platform_data mx3_ipu_data = {
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.irq_base = MXC_IPU_IRQ_START,
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};
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static struct mx3fb_platform_data mx3fb_pdata = {
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.dma_dev = &mx3_ipu.dev,
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.name = "CRT-VGA",
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.mode = fb_modedb,
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.num_modes = ARRAY_SIZE(fb_modedb),
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};
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/*
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* SDHC 1
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* MMC support
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*/
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static int armadillo5x0_sdhc1_get_ro(struct device *dev)
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{
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return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
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}
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static int armadillo5x0_sdhc1_init(struct device *dev,
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irq_handler_t detect_irq, void *data)
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{
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int ret;
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int gpio_det, gpio_wp;
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gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
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gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
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ret = gpio_request(gpio_det, "sdhc-card-detect");
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if (ret)
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return ret;
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gpio_direction_input(gpio_det);
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ret = gpio_request(gpio_wp, "sdhc-write-protect");
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if (ret)
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goto err_gpio_free;
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gpio_direction_input(gpio_wp);
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/* When supported the trigger type have to be BOTH */
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ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
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IRQF_DISABLED | IRQF_TRIGGER_FALLING,
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"sdhc-detect", data);
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if (ret)
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goto err_gpio_free_2;
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return 0;
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err_gpio_free_2:
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gpio_free(gpio_wp);
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err_gpio_free:
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gpio_free(gpio_det);
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return ret;
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}
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static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
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{
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free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
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gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
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gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
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}
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static struct imxmmc_platform_data sdhc_pdata = {
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.get_ro = armadillo5x0_sdhc1_get_ro,
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.init = armadillo5x0_sdhc1_init,
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.exit = armadillo5x0_sdhc1_exit,
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};
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/*
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* SMSC 9118
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* Network support
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*/
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static struct resource armadillo5x0_smc911x_resources[] = {
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{
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.start = CS3_BASE_ADDR,
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.end = CS3_BASE_ADDR + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
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.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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},
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};
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static struct smsc911x_platform_config smsc911x_info = {
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.flags = SMSC911X_USE_32BIT,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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};
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static struct platform_device armadillo5x0_smc911x_device = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
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.resource = armadillo5x0_smc911x_resources,
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.dev = {
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.platform_data = &smsc911x_info,
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},
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};
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/* UART device data */
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static struct imxuart_platform_data uart_pdata = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static struct platform_device *devices[] __initdata = {
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&armadillo5x0_smc911x_device,
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};
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/*
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* Perform board specific initializations
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*/
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static void __init armadillo5x0_init(void)
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{
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mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
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ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
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platform_add_devices(devices, ARRAY_SIZE(devices));
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/* Register UART */
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mxc_register_device(&mxc_uart_device0, &uart_pdata);
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mxc_register_device(&mxc_uart_device1, &uart_pdata);
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/* SMSC9118 IRQ pin */
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gpio_direction_input(MX31_PIN_GPIO1_0);
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/* Register SDHC */
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mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
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/* Register FB */
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mxc_register_device(&mx3_ipu, &mx3_ipu_data);
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mxc_register_device(&mx3_fb, &mx3fb_pdata);
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/* Register NOR Flash */
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mxc_register_device(&armadillo5x0_nor_flash,
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&armadillo5x0_nor_flash_pdata);
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}
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static void __init armadillo5x0_timer_init(void)
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{
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mx31_clocks_init(26000000);
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}
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static struct sys_timer armadillo5x0_timer = {
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.init = armadillo5x0_timer_init,
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};
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MACHINE_START(ARMADILLO5X0, "Armadillo-500")
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/* Maintainer: Alberto Panizzo */
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.phys_io = AIPS1_BASE_ADDR,
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.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
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.boot_params = PHYS_OFFSET + 0x00000100,
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.map_io = mx31_map_io,
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.init_irq = mxc_init_irq,
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.timer = &armadillo5x0_timer,
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.init_machine = armadillo5x0_init,
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MACHINE_END
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