c4bce90ea2
Yes, you heard it right, they changed the PTE layout for SUN4V. Ho hum... This is the simple and inefficient way to support this. It'll get optimized, don't worry. Signed-off-by: David S. Miller <davem@davemloft.net>
551 lines
12 KiB
C
551 lines
12 KiB
C
/* $Id: setup.c,v 1.72 2002/02/09 19:49:30 davem Exp $
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* linux/arch/sparc64/kernel/setup.c
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*
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* Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <asm/smp.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/tty.h>
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#include <linux/delay.h>
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#include <linux/config.h>
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#include <linux/fs.h>
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#include <linux/seq_file.h>
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#include <linux/syscalls.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/inet.h>
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#include <linux/console.h>
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#include <linux/root_dev.h>
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#include <linux/interrupt.h>
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#include <linux/cpu.h>
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#include <linux/initrd.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/oplib.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/idprom.h>
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#include <asm/head.h>
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#include <asm/starfire.h>
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#include <asm/mmu_context.h>
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#include <asm/timer.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/mmu.h>
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#ifdef CONFIG_IP_PNP
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#include <net/ipconfig.h>
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#endif
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struct screen_info screen_info = {
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0, 0, /* orig-x, orig-y */
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0, /* unused */
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0, /* orig-video-page */
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0, /* orig-video-mode */
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128, /* orig-video-cols */
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0, 0, 0, /* unused, ega_bx, unused */
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54, /* orig-video-lines */
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0, /* orig-video-isVGA */
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16 /* orig-video-points */
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};
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void (*prom_palette)(int);
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void (*prom_keyboard)(void);
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static void
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prom_console_write(struct console *con, const char *s, unsigned n)
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{
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prom_write(s, n);
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}
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unsigned int boot_flags = 0;
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#define BOOTME_DEBUG 0x1
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#define BOOTME_SINGLE 0x2
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/* Exported for mm/init.c:paging_init. */
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unsigned long cmdline_memory_size = 0;
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static struct console prom_debug_console = {
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.name = "debug",
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.write = prom_console_write,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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};
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/* XXX Implement this at some point... */
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void kernel_enter_debugger(void)
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{
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}
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int obp_system_intr(void)
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{
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if (boot_flags & BOOTME_DEBUG) {
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printk("OBP: system interrupted\n");
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prom_halt();
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return 1;
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}
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return 0;
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}
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/*
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* Process kernel command line switches that are specific to the
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* SPARC or that require special low-level processing.
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*/
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static void __init process_switch(char c)
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{
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switch (c) {
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case 'd':
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boot_flags |= BOOTME_DEBUG;
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break;
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case 's':
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boot_flags |= BOOTME_SINGLE;
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break;
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case 'h':
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prom_printf("boot_flags_init: Halt!\n");
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prom_halt();
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break;
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case 'p':
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/* Use PROM debug console. */
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register_console(&prom_debug_console);
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break;
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case 'P':
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/* Force UltraSPARC-III P-Cache on. */
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if (tlb_type != cheetah) {
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printk("BOOT: Ignoring P-Cache force option.\n");
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break;
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}
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cheetah_pcache_forced_on = 1;
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add_taint(TAINT_MACHINE_CHECK);
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cheetah_enable_pcache();
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break;
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default:
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printk("Unknown boot switch (-%c)\n", c);
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break;
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}
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}
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static void __init process_console(char *commands)
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{
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serial_console = 0;
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commands += 8;
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/* Linux-style serial */
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if (!strncmp(commands, "ttyS", 4))
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serial_console = simple_strtoul(commands + 4, NULL, 10) + 1;
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else if (!strncmp(commands, "tty", 3)) {
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char c = *(commands + 3);
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/* Solaris-style serial */
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if (c == 'a' || c == 'b') {
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serial_console = c - 'a' + 1;
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prom_printf ("Using /dev/tty%c as console.\n", c);
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}
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/* else Linux-style fbcon, not serial */
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}
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#if defined(CONFIG_PROM_CONSOLE)
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if (!strncmp(commands, "prom", 4)) {
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char *p;
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for (p = commands - 8; *p && *p != ' '; p++)
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*p = ' ';
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conswitchp = &prom_con;
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}
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#endif
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}
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static void __init boot_flags_init(char *commands)
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{
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while (*commands) {
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/* Move to the start of the next "argument". */
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while (*commands && *commands == ' ')
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commands++;
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/* Process any command switches, otherwise skip it. */
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if (*commands == '\0')
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break;
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if (*commands == '-') {
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commands++;
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while (*commands && *commands != ' ')
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process_switch(*commands++);
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continue;
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}
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if (!strncmp(commands, "console=", 8)) {
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process_console(commands);
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} else if (!strncmp(commands, "mem=", 4)) {
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/*
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* "mem=XXX[kKmM]" overrides the PROM-reported
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* memory size.
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*/
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cmdline_memory_size = simple_strtoul(commands + 4,
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&commands, 0);
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if (*commands == 'K' || *commands == 'k') {
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cmdline_memory_size <<= 10;
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commands++;
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} else if (*commands=='M' || *commands=='m') {
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cmdline_memory_size <<= 20;
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commands++;
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}
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}
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while (*commands && *commands != ' ')
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commands++;
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}
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}
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extern void panic_setup(char *, int *);
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extern unsigned short root_flags;
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extern unsigned short root_dev;
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extern unsigned short ram_flags;
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#define RAMDISK_IMAGE_START_MASK 0x07FF
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#define RAMDISK_PROMPT_FLAG 0x8000
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#define RAMDISK_LOAD_FLAG 0x4000
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extern int root_mountflags;
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char reboot_command[COMMAND_LINE_SIZE];
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static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
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static void __init per_cpu_patch(void)
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{
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#ifdef CONFIG_SMP
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struct cpuid_patch_entry *p;
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unsigned long ver;
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int is_jbus;
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if (tlb_type == spitfire && !this_is_starfire)
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return;
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is_jbus = 0;
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if (tlb_type != hypervisor) {
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__asm__ ("rdpr %%ver, %0" : "=r" (ver));
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is_jbus = ((ver >> 32) == __JALAPENO_ID ||
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(ver >> 32) == __SERRANO_ID);
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}
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p = &__cpuid_patch;
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while (p < &__cpuid_patch_end) {
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unsigned long addr = p->addr;
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unsigned int *insns;
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switch (tlb_type) {
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case spitfire:
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insns = &p->starfire[0];
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break;
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case cheetah:
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case cheetah_plus:
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if (is_jbus)
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insns = &p->cheetah_jbus[0];
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else
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insns = &p->cheetah_safari[0];
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break;
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case hypervisor:
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insns = &p->sun4v[0];
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break;
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default:
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prom_printf("Unknown cpu type, halting.\n");
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prom_halt();
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};
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*(unsigned int *) (addr + 0) = insns[0];
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wmb();
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__asm__ __volatile__("flush %0" : : "r" (addr + 0));
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*(unsigned int *) (addr + 4) = insns[1];
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wmb();
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__asm__ __volatile__("flush %0" : : "r" (addr + 4));
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*(unsigned int *) (addr + 8) = insns[2];
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wmb();
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__asm__ __volatile__("flush %0" : : "r" (addr + 8));
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*(unsigned int *) (addr + 12) = insns[3];
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wmb();
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__asm__ __volatile__("flush %0" : : "r" (addr + 12));
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p++;
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}
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#endif
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}
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static void __init sun4v_patch(void)
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{
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struct sun4v_1insn_patch_entry *p1;
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struct sun4v_2insn_patch_entry *p2;
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if (tlb_type != hypervisor)
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return;
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p1 = &__sun4v_1insn_patch;
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while (p1 < &__sun4v_1insn_patch_end) {
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unsigned long addr = p1->addr;
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*(unsigned int *) (addr + 0) = p1->insn;
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wmb();
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__asm__ __volatile__("flush %0" : : "r" (addr + 0));
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p1++;
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}
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p2 = &__sun4v_2insn_patch;
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while (p2 < &__sun4v_2insn_patch_end) {
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unsigned long addr = p2->addr;
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*(unsigned int *) (addr + 0) = p2->insns[0];
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wmb();
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__asm__ __volatile__("flush %0" : : "r" (addr + 0));
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*(unsigned int *) (addr + 4) = p2->insns[1];
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wmb();
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__asm__ __volatile__("flush %0" : : "r" (addr + 4));
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p2++;
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}
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}
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void __init setup_arch(char **cmdline_p)
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{
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/* Initialize PROM console and command line. */
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*cmdline_p = prom_getbootargs();
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strcpy(saved_command_line, *cmdline_p);
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if (tlb_type == hypervisor)
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printk("ARCH: SUN4V\n");
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else
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printk("ARCH: SUN4U\n");
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#elif defined(CONFIG_PROM_CONSOLE)
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conswitchp = &prom_con;
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#endif
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/* Work out if we are starfire early on */
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check_if_starfire();
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/* Now we know enough to patch the get_cpuid sequences
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* used by trap code.
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*/
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per_cpu_patch();
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sun4v_patch();
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boot_flags_init(*cmdline_p);
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idprom_init();
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if (!root_flags)
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root_mountflags &= ~MS_RDONLY;
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ROOT_DEV = old_decode_dev(root_dev);
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#ifdef CONFIG_BLK_DEV_INITRD
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rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
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rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
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rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
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#endif
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task_thread_info(&init_task)->kregs = &fake_swapper_regs;
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#ifdef CONFIG_IP_PNP
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if (!ic_set_manually) {
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int chosen = prom_finddevice ("/chosen");
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u32 cl, sv, gw;
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cl = prom_getintdefault (chosen, "client-ip", 0);
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sv = prom_getintdefault (chosen, "server-ip", 0);
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gw = prom_getintdefault (chosen, "gateway-ip", 0);
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if (cl && sv) {
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ic_myaddr = cl;
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ic_servaddr = sv;
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if (gw)
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ic_gateway = gw;
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#if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
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ic_proto_enabled = 0;
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#endif
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}
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}
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#endif
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smp_setup_cpu_possible_map();
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paging_init();
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/* Get boot processor trap_block[] setup. */
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init_cur_cpu_trap();
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}
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static int __init set_preferred_console(void)
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{
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int idev, odev;
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/* The user has requested a console so this is already set up. */
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if (serial_console >= 0)
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return -EBUSY;
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idev = prom_query_input_device();
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odev = prom_query_output_device();
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if (idev == PROMDEV_IKBD && odev == PROMDEV_OSCREEN) {
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serial_console = 0;
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} else if (idev == PROMDEV_ITTYA && odev == PROMDEV_OTTYA) {
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serial_console = 1;
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} else if (idev == PROMDEV_ITTYB && odev == PROMDEV_OTTYB) {
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serial_console = 2;
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} else if (idev == PROMDEV_IRSC && odev == PROMDEV_ORSC) {
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serial_console = 3;
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} else {
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prom_printf("Inconsistent console: "
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"input %d, output %d\n",
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idev, odev);
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prom_halt();
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}
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if (serial_console)
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return add_preferred_console("ttyS", serial_console - 1, NULL);
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return -ENODEV;
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}
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console_initcall(set_preferred_console);
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/* BUFFER is PAGE_SIZE bytes long. */
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extern char *sparc_cpu_type;
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extern char *sparc_fpu_type;
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extern void smp_info(struct seq_file *);
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extern void smp_bogo(struct seq_file *);
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extern void mmu_info(struct seq_file *);
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unsigned int dcache_parity_tl1_occurred;
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unsigned int icache_parity_tl1_occurred;
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static int ncpus_probed;
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static int show_cpuinfo(struct seq_file *m, void *__unused)
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{
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seq_printf(m,
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"cpu\t\t: %s\n"
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"fpu\t\t: %s\n"
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"promlib\t\t: Version 3 Revision %d\n"
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"prom\t\t: %d.%d.%d\n"
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"type\t\t: sun4u\n"
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"ncpus probed\t: %d\n"
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"ncpus active\t: %d\n"
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"D$ parity tl1\t: %u\n"
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"I$ parity tl1\t: %u\n"
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#ifndef CONFIG_SMP
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"Cpu0Bogo\t: %lu.%02lu\n"
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"Cpu0ClkTck\t: %016lx\n"
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#endif
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,
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sparc_cpu_type,
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sparc_fpu_type,
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prom_rev,
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prom_prev >> 16,
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(prom_prev >> 8) & 0xff,
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prom_prev & 0xff,
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ncpus_probed,
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num_online_cpus(),
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dcache_parity_tl1_occurred,
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icache_parity_tl1_occurred
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#ifndef CONFIG_SMP
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, cpu_data(0).udelay_val/(500000/HZ),
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(cpu_data(0).udelay_val/(5000/HZ)) % 100,
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cpu_data(0).clock_tick
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#endif
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);
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#ifdef CONFIG_SMP
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smp_bogo(m);
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#endif
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mmu_info(m);
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#ifdef CONFIG_SMP
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smp_info(m);
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#endif
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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/* The pointer we are returning is arbitrary,
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* it just has to be non-NULL and not IS_ERR
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* in the success case.
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*/
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return *pos == 0 ? &c_start : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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struct seq_operations cpuinfo_op = {
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.start =c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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extern int stop_a_enabled;
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void sun_do_break(void)
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{
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if (!stop_a_enabled)
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return;
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prom_printf("\n");
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flush_user_windows();
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prom_cmdline();
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}
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int serial_console = -1;
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int stop_a_enabled = 1;
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static int __init topology_init(void)
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{
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int i, err;
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err = -ENOMEM;
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/* Count the number of physically present processors in
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* the machine, even on uniprocessor, so that /proc/cpuinfo
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* output is consistent with 2.4.x
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*/
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ncpus_probed = 0;
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while (!cpu_find_by_instance(ncpus_probed, NULL, NULL))
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ncpus_probed++;
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for (i = 0; i < NR_CPUS; i++) {
|
|
if (cpu_possible(i)) {
|
|
struct cpu *p = kmalloc(sizeof(*p), GFP_KERNEL);
|
|
|
|
if (p) {
|
|
memset(p, 0, sizeof(*p));
|
|
register_cpu(p, i, NULL);
|
|
err = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
subsys_initcall(topology_init);
|