adde42b583
at32_reserve_pin now takes an u32 bitmask rather than a single pin. This allows to reserve multiple pins at once. Remove (undocumented) SDCS (pin PE26) from reservation in board setup code. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
473 lines
10 KiB
C
473 lines
10 KiB
C
/*
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* Atmel PIO2 Port Multiplexer support
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*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/fs.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <mach/portmux.h>
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#include "pio.h"
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#define MAX_NR_PIO_DEVICES 8
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struct pio_device {
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struct gpio_chip chip;
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void __iomem *regs;
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const struct platform_device *pdev;
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struct clk *clk;
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u32 pinmux_mask;
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char name[8];
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};
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static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
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static struct pio_device *gpio_to_pio(unsigned int gpio)
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{
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struct pio_device *pio;
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unsigned int index;
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index = gpio >> 5;
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if (index >= MAX_NR_PIO_DEVICES)
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return NULL;
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pio = &pio_dev[index];
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if (!pio->regs)
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return NULL;
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return pio;
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}
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/* Pin multiplexing API */
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static DEFINE_SPINLOCK(pio_lock);
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void __init at32_select_periph(unsigned int port, u32 pin_mask,
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unsigned int periph, unsigned long flags)
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{
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struct pio_device *pio;
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/* assign and verify pio */
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pio = gpio_to_pio(port);
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if (unlikely(!pio)) {
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printk(KERN_WARNING "pio: invalid port %u\n", port);
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goto fail;
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}
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/* Test if any of the requested pins is already muxed */
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spin_lock(&pio_lock);
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if (unlikely(pio->pinmux_mask & pin_mask)) {
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printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n",
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pio->name, pin_mask, pio->pinmux_mask & pin_mask);
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spin_unlock(&pio_lock);
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goto fail;
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}
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pio->pinmux_mask |= pin_mask;
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/* enable pull ups */
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pio_writel(pio, PUER, pin_mask);
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/* select either peripheral A or B */
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if (periph)
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pio_writel(pio, BSR, pin_mask);
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else
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pio_writel(pio, ASR, pin_mask);
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/* enable peripheral control */
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pio_writel(pio, PDR, pin_mask);
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/* Disable pull ups if not requested. */
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if (!(flags & AT32_GPIOF_PULLUP))
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pio_writel(pio, PUDR, pin_mask);
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spin_unlock(&pio_lock);
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return;
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fail:
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dump_stack();
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}
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void __init at32_select_gpio(unsigned int pin, unsigned long flags)
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{
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struct pio_device *pio;
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unsigned int pin_index = pin & 0x1f;
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u32 mask = 1 << pin_index;
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pio = gpio_to_pio(pin);
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if (unlikely(!pio)) {
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printk("pio: invalid pin %u\n", pin);
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goto fail;
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}
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if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
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printk("%s: pin %u is busy\n", pio->name, pin_index);
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goto fail;
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}
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if (flags & AT32_GPIOF_OUTPUT) {
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if (flags & AT32_GPIOF_HIGH)
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pio_writel(pio, SODR, mask);
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else
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pio_writel(pio, CODR, mask);
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if (flags & AT32_GPIOF_MULTIDRV)
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pio_writel(pio, MDER, mask);
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else
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pio_writel(pio, MDDR, mask);
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pio_writel(pio, PUDR, mask);
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pio_writel(pio, OER, mask);
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} else {
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if (flags & AT32_GPIOF_PULLUP)
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pio_writel(pio, PUER, mask);
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else
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pio_writel(pio, PUDR, mask);
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if (flags & AT32_GPIOF_DEGLITCH)
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pio_writel(pio, IFER, mask);
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else
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pio_writel(pio, IFDR, mask);
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pio_writel(pio, ODR, mask);
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}
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pio_writel(pio, PER, mask);
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return;
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fail:
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dump_stack();
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}
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/*
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* Undo a previous pin reservation. Will not affect the hardware
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* configuration.
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*/
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void at32_deselect_pin(unsigned int pin)
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{
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struct pio_device *pio;
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unsigned int pin_index = pin & 0x1f;
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pio = gpio_to_pio(pin);
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if (unlikely(!pio)) {
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printk("pio: invalid pin %u\n", pin);
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dump_stack();
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return;
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}
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clear_bit(pin_index, &pio->pinmux_mask);
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}
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/* Reserve a pin, preventing anyone else from changing its configuration. */
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void __init at32_reserve_pin(unsigned int port, u32 pin_mask)
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{
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struct pio_device *pio;
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/* assign and verify pio */
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pio = gpio_to_pio(port);
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if (unlikely(!pio)) {
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printk(KERN_WARNING "pio: invalid port %u\n", port);
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goto fail;
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}
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/* Test if any of the requested pins is already muxed */
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spin_lock(&pio_lock);
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if (unlikely(pio->pinmux_mask & pin_mask)) {
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printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n",
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pio->name, pin_mask, pio->pinmux_mask & pin_mask);
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spin_unlock(&pio_lock);
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goto fail;
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}
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/* Reserve pins */
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pio->pinmux_mask |= pin_mask;
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spin_unlock(&pio_lock);
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return;
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fail:
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dump_stack();
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}
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/*--------------------------------------------------------------------------*/
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/* GPIO API */
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static int direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct pio_device *pio = container_of(chip, struct pio_device, chip);
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u32 mask = 1 << offset;
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if (!(pio_readl(pio, PSR) & mask))
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return -EINVAL;
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pio_writel(pio, ODR, mask);
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return 0;
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}
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static int gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct pio_device *pio = container_of(chip, struct pio_device, chip);
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return (pio_readl(pio, PDSR) >> offset) & 1;
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}
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static void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
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static int direction_output(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct pio_device *pio = container_of(chip, struct pio_device, chip);
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u32 mask = 1 << offset;
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if (!(pio_readl(pio, PSR) & mask))
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return -EINVAL;
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gpio_set(chip, offset, value);
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pio_writel(pio, OER, mask);
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return 0;
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}
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static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct pio_device *pio = container_of(chip, struct pio_device, chip);
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u32 mask = 1 << offset;
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if (value)
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pio_writel(pio, SODR, mask);
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else
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pio_writel(pio, CODR, mask);
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}
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/*--------------------------------------------------------------------------*/
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/* GPIO IRQ support */
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static void gpio_irq_mask(unsigned irq)
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{
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unsigned gpio = irq_to_gpio(irq);
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struct pio_device *pio = &pio_dev[gpio >> 5];
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pio_writel(pio, IDR, 1 << (gpio & 0x1f));
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}
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static void gpio_irq_unmask(unsigned irq)
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{
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unsigned gpio = irq_to_gpio(irq);
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struct pio_device *pio = &pio_dev[gpio >> 5];
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pio_writel(pio, IER, 1 << (gpio & 0x1f));
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}
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static int gpio_irq_type(unsigned irq, unsigned type)
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{
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if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
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return -EINVAL;
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return 0;
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}
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static struct irq_chip gpio_irqchip = {
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.name = "gpio",
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.mask = gpio_irq_mask,
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.unmask = gpio_irq_unmask,
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.set_type = gpio_irq_type,
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};
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static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
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{
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struct pio_device *pio = get_irq_chip_data(irq);
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unsigned gpio_irq;
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gpio_irq = (unsigned) get_irq_data(irq);
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for (;;) {
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u32 isr;
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struct irq_desc *d;
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/* ack pending GPIO interrupts */
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isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
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if (!isr)
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break;
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do {
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int i;
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i = ffs(isr) - 1;
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isr &= ~(1 << i);
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i += gpio_irq;
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d = &irq_desc[i];
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d->handle_irq(i, d);
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} while (isr);
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}
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}
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static void __init
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gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
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{
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unsigned i;
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set_irq_chip_data(irq, pio);
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set_irq_data(irq, (void *) gpio_irq);
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for (i = 0; i < 32; i++, gpio_irq++) {
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set_irq_chip_data(gpio_irq, pio);
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set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
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handle_simple_irq);
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}
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set_irq_chained_handler(irq, gpio_irq_handler);
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}
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/*--------------------------------------------------------------------------*/
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#ifdef CONFIG_DEBUG_FS
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#include <linux/seq_file.h>
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/*
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* This shows more info than the generic gpio dump code:
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* pullups, deglitching, open drain drive.
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*/
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static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip)
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{
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struct pio_device *pio = container_of(chip, struct pio_device, chip);
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u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr;
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unsigned i;
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u32 mask;
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char bank;
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psr = pio_readl(pio, PSR);
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osr = pio_readl(pio, OSR);
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imr = pio_readl(pio, IMR);
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pdsr = pio_readl(pio, PDSR);
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pusr = pio_readl(pio, PUSR);
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ifsr = pio_readl(pio, IFSR);
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mdsr = pio_readl(pio, MDSR);
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bank = 'A' + pio->pdev->id;
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for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
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const char *label;
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label = gpiochip_is_requested(chip, i);
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if (!label && (imr & mask))
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label = "[irq]";
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if (!label)
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continue;
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seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
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chip->base + i, bank, i,
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label,
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(osr & mask) ? "out" : "in ",
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(mask & pdsr) ? "hi" : "lo",
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(mask & pusr) ? " " : "up");
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if (ifsr & mask)
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seq_printf(s, " deglitch");
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if ((osr & mdsr) & mask)
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seq_printf(s, " open-drain");
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if (imr & mask)
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seq_printf(s, " irq-%d edge-both",
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gpio_to_irq(chip->base + i));
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seq_printf(s, "\n");
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}
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}
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#else
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#define pio_bank_show NULL
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#endif
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/*--------------------------------------------------------------------------*/
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static int __init pio_probe(struct platform_device *pdev)
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{
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struct pio_device *pio = NULL;
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int irq = platform_get_irq(pdev, 0);
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int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
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BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
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pio = &pio_dev[pdev->id];
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BUG_ON(!pio->regs);
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pio->chip.label = pio->name;
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pio->chip.base = pdev->id * 32;
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pio->chip.ngpio = 32;
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pio->chip.dev = &pdev->dev;
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pio->chip.owner = THIS_MODULE;
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pio->chip.direction_input = direction_input;
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pio->chip.get = gpio_get;
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pio->chip.direction_output = direction_output;
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pio->chip.set = gpio_set;
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pio->chip.dbg_show = pio_bank_show;
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gpiochip_add(&pio->chip);
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gpio_irq_setup(pio, irq, gpio_irq_base);
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platform_set_drvdata(pdev, pio);
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printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
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pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
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return 0;
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}
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static struct platform_driver pio_driver = {
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.driver = {
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.name = "pio",
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},
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};
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static int __init pio_init(void)
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{
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return platform_driver_probe(&pio_driver, pio_probe);
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}
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postcore_initcall(pio_init);
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void __init at32_init_pio(struct platform_device *pdev)
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{
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struct resource *regs;
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struct pio_device *pio;
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if (pdev->id > MAX_NR_PIO_DEVICES) {
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dev_err(&pdev->dev, "only %d PIO devices supported\n",
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MAX_NR_PIO_DEVICES);
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return;
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}
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pio = &pio_dev[pdev->id];
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snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id);
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regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!regs) {
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dev_err(&pdev->dev, "no mmio resource defined\n");
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return;
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}
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pio->clk = clk_get(&pdev->dev, "mck");
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if (IS_ERR(pio->clk))
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/*
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* This is a fatal error, but if we continue we might
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* be so lucky that we manage to initialize the
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* console and display this message...
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*/
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dev_err(&pdev->dev, "no mck clock defined\n");
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else
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clk_enable(pio->clk);
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pio->pdev = pdev;
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pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
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/* start with irqs disabled and acked */
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pio_writel(pio, IDR, ~0UL);
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(void) pio_readl(pio, ISR);
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}
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