154e3af17f
Ever wondered why the signal was so bad with p54 compared to madwifi, or intel? Well, if you have revision 1 rssi calibration curve points in your EEPROM, then wonder no more. The firmware wants a extra 1 byte padding for every curve point. But someone forgot to put them into the EEPROM's data structure... So now, big question: what happens when we blindly "memcpy" these data points? Signed-off-by: Christian Lamparter <chunkeey@web.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
269 lines
5.8 KiB
C
269 lines
5.8 KiB
C
#ifndef P54COMMON_H
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#define P54COMMON_H
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/*
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* Common code specific definitions for mac80211 Prism54 drivers
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*
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* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
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* Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
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*
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* Based on the islsm (softmac prism54) driver, which is:
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* Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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struct bootrec {
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__le32 code;
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__le32 len;
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u32 data[0];
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} __attribute__((packed));
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struct bootrec_exp_if {
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__le16 role;
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__le16 if_id;
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__le16 variant;
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__le16 btm_compat;
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__le16 top_compat;
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} __attribute__((packed));
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#define BR_CODE_MIN 0x80000000
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#define BR_CODE_COMPONENT_ID 0x80000001
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#define BR_CODE_COMPONENT_VERSION 0x80000002
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#define BR_CODE_DEPENDENT_IF 0x80000003
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#define BR_CODE_EXPOSED_IF 0x80000004
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#define BR_CODE_DESCR 0x80000101
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#define BR_CODE_MAX 0x8FFFFFFF
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#define BR_CODE_END_OF_BRA 0xFF0000FF
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#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
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#define FW_FMAC 0x464d4143
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#define FW_LM86 0x4c4d3836
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#define FW_LM87 0x4c4d3837
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#define FW_LM20 0x4c4d3230
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/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
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struct pda_entry {
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__le16 len; /* includes both code and data */
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__le16 code;
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u8 data[0];
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} __attribute__ ((packed));
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struct eeprom_pda_wrap {
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__le32 magic;
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__le16 pad;
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__le16 len;
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__le32 arm_opcode;
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u8 data[0];
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} __attribute__ ((packed));
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struct pda_iq_autocal_entry {
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__le16 freq;
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__le16 iq_param[4];
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} __attribute__ ((packed));
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struct pda_channel_output_limit {
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__le16 freq;
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u8 val_bpsk;
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u8 val_qpsk;
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u8 val_16qam;
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u8 val_64qam;
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u8 rate_set_mask;
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u8 rate_set_size;
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} __attribute__ ((packed));
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struct pda_pa_curve_data_sample_rev0 {
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u8 rf_power;
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u8 pa_detector;
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u8 pcv;
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} __attribute__ ((packed));
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struct pda_pa_curve_data_sample_rev1 {
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u8 rf_power;
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u8 pa_detector;
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u8 data_barker;
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u8 data_bpsk;
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u8 data_qpsk;
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u8 data_16qam;
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u8 data_64qam;
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} __attribute__ ((packed));
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struct p54_pa_curve_data_sample {
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u8 rf_power;
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u8 pa_detector;
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u8 data_barker;
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u8 data_bpsk;
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u8 data_qpsk;
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u8 data_16qam;
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u8 data_64qam;
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u8 padding;
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} __attribute__ ((packed));
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struct pda_pa_curve_data {
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u8 cal_method_rev;
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u8 channels;
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u8 points_per_channel;
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u8 padding;
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u8 data[0];
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} __attribute__ ((packed));
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/*
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* this defines the PDR codes used to build PDAs as defined in document
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* number 553155. The current implementation mirrors version 1.1 of the
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* document and lists only PDRs supported by the ARM platform.
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*/
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/* common and choice range (0x0000 - 0x0fff) */
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#define PDR_END 0x0000
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#define PDR_MANUFACTURING_PART_NUMBER 0x0001
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#define PDR_PDA_VERSION 0x0002
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#define PDR_NIC_SERIAL_NUMBER 0x0003
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#define PDR_MAC_ADDRESS 0x0101
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#define PDR_REGULATORY_DOMAIN_LIST 0x0103
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#define PDR_TEMPERATURE_TYPE 0x0107
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#define PDR_PRISM_PCI_IDENTIFIER 0x0402
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/* ARM range (0x1000 - 0x1fff) */
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#define PDR_COUNTRY_INFORMATION 0x1000
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#define PDR_INTERFACE_LIST 0x1001
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#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
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#define PDR_OEM_NAME 0x1003
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#define PDR_PRODUCT_NAME 0x1004
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#define PDR_UTF8_OEM_NAME 0x1005
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#define PDR_UTF8_PRODUCT_NAME 0x1006
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#define PDR_COUNTRY_LIST 0x1007
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#define PDR_DEFAULT_COUNTRY 0x1008
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#define PDR_ANTENNA_GAIN 0x1100
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#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
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#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
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#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
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#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
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#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
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#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
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#define PDR_REGULATORY_POWER_LIMITS 0x1907
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#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
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#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
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#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
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/* reserved range (0x2000 - 0x7fff) */
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/* customer range (0x8000 - 0xffff) */
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#define PDR_BASEBAND_REGISTERS 0x8000
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#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
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/* stored in skb->cb */
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struct memrecord {
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u32 start_addr;
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u32 end_addr;
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};
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struct p54_eeprom_lm86 {
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__le16 offset;
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__le16 len;
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u8 data[0];
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} __attribute__ ((packed));
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struct p54_rx_hdr {
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__le16 magic;
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__le16 len;
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__le16 freq;
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u8 antenna;
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u8 rate;
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u8 rssi;
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u8 quality;
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u16 unknown2;
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__le64 timestamp;
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u8 data[0];
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} __attribute__ ((packed));
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struct p54_frame_sent_hdr {
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u8 status;
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u8 retries;
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__le16 ack_rssi;
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__le16 seq;
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u16 rate;
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} __attribute__ ((packed));
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struct p54_tx_control_allocdata {
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u8 rateset[8];
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u8 unalloc0[2];
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u8 key_type;
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u8 key_len;
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u8 key[16];
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u8 hw_queue;
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u8 unalloc1[9];
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u8 tx_antenna;
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u8 output_power;
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u8 cts_rate;
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u8 unalloc2[3];
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u8 align[0];
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} __attribute__ ((packed));
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struct p54_tx_control_filter {
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__le16 filter_type;
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u8 dst[ETH_ALEN];
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u8 src[ETH_ALEN];
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u8 antenna;
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u8 debug;
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__le32 magic3;
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u8 rates[8]; // FIXME: what's this for?
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__le32 rx_addr;
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__le16 max_rx;
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__le16 rxhw;
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__le16 magic8;
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__le16 magic9;
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} __attribute__ ((packed));
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struct p54_tx_control_channel {
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__le16 flags;
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__le16 dwell;
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u8 padding1[20];
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struct pda_iq_autocal_entry iq_autocal;
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u8 pa_points_per_curve;
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u8 val_barker;
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u8 val_bpsk;
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u8 val_qpsk;
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u8 val_16qam;
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u8 val_64qam;
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struct pda_pa_curve_data_sample_rev1 curve_data[8];
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u8 dup_bpsk;
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u8 dup_qpsk;
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u8 dup_16qam;
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u8 dup_64qam;
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__le16 rssical_mul;
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__le16 rssical_add;
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} __attribute__ ((packed));
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struct p54_tx_control_led {
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__le16 mode;
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__le16 led_temporary;
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__le16 led_permanent;
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__le16 duration;
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} __attribute__ ((packed));
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struct p54_tx_vdcf_queues {
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__le16 aifs;
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__le16 cwmin;
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__le16 cwmax;
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__le16 txop;
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} __attribute__ ((packed));
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struct p54_tx_control_vdcf {
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u8 padding;
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u8 slottime;
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u8 magic1;
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u8 magic2;
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struct p54_tx_vdcf_queues queue[8];
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u8 pad2[4];
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__le16 frameburst;
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} __attribute__ ((packed));
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#endif /* P54COMMON_H */
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