android_kernel_xiaomi_sm8350/arch/sh/kernel/cpu/sh3
Stuart Menefy cbaa118ecf sh: Preparation for uncached jumps through PMB.
Presently most of the 29-bit physical parts do P1/P2 segmentation
with a 1:1 cached/uncached mapping, jumping between the two to
control the caching behaviour. This provides the basic infrastructure
to maintain this behaviour on 32-bit physical parts that don't map
P1/P2 at all, using a shiny new linker section and corresponding
fixmap entry.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:59 +09:00
..
clock-sh3.c
clock-sh7705.c
clock-sh7706.c
clock-sh7709.c
clock-sh7710.c
entry.S sh: GUSA atomic rollback support. 2008-01-28 13:18:58 +09:00
ex.S sh: SH-2A FPU support. 2008-01-28 13:18:57 +09:00
Makefile sh: Add SH7720 CPU support. 2007-09-21 11:57:49 +09:00
probe.c sh: Preparation for uncached jumps through PMB. 2008-01-28 13:18:59 +09:00
setup-sh770x.c sh: intc - mark data structures as __initdata 2007-09-21 11:57:50 +09:00
setup-sh7705.c sh: intc - mark data structures as __initdata 2007-09-21 11:57:50 +09:00
setup-sh7710.c sh: intc - mark data structures as __initdata 2007-09-21 11:57:50 +09:00
setup-sh7720.c sh: Add SH7720 CPU support. 2007-09-21 11:57:49 +09:00