6b3087c64a
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin header files and machine common code Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
73 lines
1.6 KiB
C
73 lines
1.6 KiB
C
/*
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* Pull in the generic implementation for the mutex fastpath.
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*
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* TODO: implement optimized primitives instead, or leave the generic
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* implementation in place, or pick the atomic_xchg() based generic
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* implementation. (see asm-generic/mutex-xchg.h for details)
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*/
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#ifndef _ASM_MUTEX_H
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#define _ASM_MUTEX_H
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#ifndef CONFIG_SMP
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#include <asm-generic/mutex-dec.h>
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#else
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static inline void
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__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
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{
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if (unlikely(atomic_dec_return(count) < 0))
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fail_fn(count);
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else
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smp_mb();
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}
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static inline int
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__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
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{
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if (unlikely(atomic_dec_return(count) < 0))
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return fail_fn(count);
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else {
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smp_mb();
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return 0;
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}
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}
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static inline void
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__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
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{
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smp_mb();
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if (unlikely(atomic_inc_return(count) <= 0))
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fail_fn(count);
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}
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#define __mutex_slowpath_needs_to_unlock() 1
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static inline int
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__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
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{
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/*
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* We have two variants here. The cmpxchg based one is the best one
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* because it never induce a false contention state. It is included
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* here because architectures using the inc/dec algorithms over the
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* xchg ones are much more likely to support cmpxchg natively.
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*
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* If not we fall back to the spinlock based variant - that is
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* just as efficient (and simpler) as a 'destructive' probing of
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* the mutex state would be.
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*/
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#ifdef __HAVE_ARCH_CMPXCHG
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if (likely(atomic_cmpxchg(count, 1, 0) == 1)) {
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smp_mb();
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return 1;
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}
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return 0;
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#else
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return fail_fn(count);
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#endif
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}
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#endif
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#endif
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