403 lines
14 KiB
C
403 lines
14 KiB
C
/*
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* Machine vector for IA-64.
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*
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* Copyright (C) 1999 Silicon Graphics, Inc.
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* Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
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* Copyright (C) Vijay Chander <vijay@engr.sgi.com>
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* Copyright (C) 1999-2001, 2003-2004 Hewlett-Packard Co.
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#ifndef _ASM_IA64_MACHVEC_H
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#define _ASM_IA64_MACHVEC_H
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#include <linux/types.h>
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/* forward declarations: */
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struct device;
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struct pt_regs;
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struct scatterlist;
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struct page;
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struct mm_struct;
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struct pci_bus;
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struct task_struct;
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typedef void ia64_mv_setup_t (char **);
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typedef void ia64_mv_cpu_init_t (void);
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typedef void ia64_mv_irq_init_t (void);
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typedef void ia64_mv_send_ipi_t (int, int, int, int);
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typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *);
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typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long);
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typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *);
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typedef unsigned int ia64_mv_local_vector_to_irq (u8);
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typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *);
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typedef int ia64_mv_pci_legacy_read_t (struct pci_bus *, u16 port, u32 *val,
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u8 size);
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typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val,
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u8 size);
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typedef void ia64_mv_migrate_t(struct task_struct * task);
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/* DMA-mapping interface: */
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typedef void ia64_mv_dma_init (void);
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typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t);
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typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t);
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typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int);
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typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int);
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typedef int ia64_mv_dma_map_sg (struct device *, struct scatterlist *, int, int);
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typedef void ia64_mv_dma_unmap_sg (struct device *, struct scatterlist *, int, int);
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typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_t, int);
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typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int);
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typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int);
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typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int);
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typedef int ia64_mv_dma_mapping_error (dma_addr_t dma_addr);
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typedef int ia64_mv_dma_supported (struct device *, u64);
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/*
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* WARNING: The legacy I/O space is _architected_. Platforms are
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* expected to follow this architected model (see Section 10.7 in the
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* IA-64 Architecture Software Developer's Manual). Unfortunately,
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* some broken machines do not follow that model, which is why we have
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* to make the inX/outX operations part of the machine vector.
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* Platform designers should follow the architected model whenever
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* possible.
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*/
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typedef unsigned int ia64_mv_inb_t (unsigned long);
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typedef unsigned int ia64_mv_inw_t (unsigned long);
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typedef unsigned int ia64_mv_inl_t (unsigned long);
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typedef void ia64_mv_outb_t (unsigned char, unsigned long);
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typedef void ia64_mv_outw_t (unsigned short, unsigned long);
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typedef void ia64_mv_outl_t (unsigned int, unsigned long);
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typedef void ia64_mv_mmiowb_t (void);
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typedef unsigned char ia64_mv_readb_t (const volatile void __iomem *);
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typedef unsigned short ia64_mv_readw_t (const volatile void __iomem *);
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typedef unsigned int ia64_mv_readl_t (const volatile void __iomem *);
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typedef unsigned long ia64_mv_readq_t (const volatile void __iomem *);
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typedef unsigned char ia64_mv_readb_relaxed_t (const volatile void __iomem *);
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typedef unsigned short ia64_mv_readw_relaxed_t (const volatile void __iomem *);
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typedef unsigned int ia64_mv_readl_relaxed_t (const volatile void __iomem *);
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typedef unsigned long ia64_mv_readq_relaxed_t (const volatile void __iomem *);
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static inline void
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machvec_noop (void)
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{
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}
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static inline void
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machvec_noop_mm (struct mm_struct *mm)
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{
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}
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static inline void
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machvec_noop_task (struct task_struct *task)
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{
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}
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extern void machvec_setup (char **);
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extern void machvec_timer_interrupt (int, void *, struct pt_regs *);
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extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int);
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extern void machvec_dma_sync_sg (struct device *, struct scatterlist *, int, int);
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extern void machvec_tlb_migrate_finish (struct mm_struct *);
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# if defined (CONFIG_IA64_HP_SIM)
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# include <asm/machvec_hpsim.h>
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# elif defined (CONFIG_IA64_DIG)
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# include <asm/machvec_dig.h>
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# elif defined (CONFIG_IA64_HP_ZX1)
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# include <asm/machvec_hpzx1.h>
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# elif defined (CONFIG_IA64_HP_ZX1_SWIOTLB)
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# include <asm/machvec_hpzx1_swiotlb.h>
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# elif defined (CONFIG_IA64_SGI_SN2)
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# include <asm/machvec_sn2.h>
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# elif defined (CONFIG_IA64_GENERIC)
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# ifdef MACHVEC_PLATFORM_HEADER
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# include MACHVEC_PLATFORM_HEADER
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# else
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# define platform_name ia64_mv.name
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# define platform_setup ia64_mv.setup
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# define platform_cpu_init ia64_mv.cpu_init
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# define platform_irq_init ia64_mv.irq_init
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# define platform_send_ipi ia64_mv.send_ipi
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# define platform_timer_interrupt ia64_mv.timer_interrupt
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# define platform_global_tlb_purge ia64_mv.global_tlb_purge
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# define platform_tlb_migrate_finish ia64_mv.tlb_migrate_finish
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# define platform_dma_init ia64_mv.dma_init
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# define platform_dma_alloc_coherent ia64_mv.dma_alloc_coherent
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# define platform_dma_free_coherent ia64_mv.dma_free_coherent
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# define platform_dma_map_single ia64_mv.dma_map_single
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# define platform_dma_unmap_single ia64_mv.dma_unmap_single
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# define platform_dma_map_sg ia64_mv.dma_map_sg
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# define platform_dma_unmap_sg ia64_mv.dma_unmap_sg
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# define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu
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# define platform_dma_sync_sg_for_cpu ia64_mv.dma_sync_sg_for_cpu
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# define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device
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# define platform_dma_sync_sg_for_device ia64_mv.dma_sync_sg_for_device
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# define platform_dma_mapping_error ia64_mv.dma_mapping_error
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# define platform_dma_supported ia64_mv.dma_supported
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# define platform_local_vector_to_irq ia64_mv.local_vector_to_irq
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# define platform_pci_get_legacy_mem ia64_mv.pci_get_legacy_mem
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# define platform_pci_legacy_read ia64_mv.pci_legacy_read
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# define platform_pci_legacy_write ia64_mv.pci_legacy_write
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# define platform_inb ia64_mv.inb
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# define platform_inw ia64_mv.inw
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# define platform_inl ia64_mv.inl
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# define platform_outb ia64_mv.outb
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# define platform_outw ia64_mv.outw
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# define platform_outl ia64_mv.outl
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# define platform_mmiowb ia64_mv.mmiowb
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# define platform_readb ia64_mv.readb
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# define platform_readw ia64_mv.readw
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# define platform_readl ia64_mv.readl
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# define platform_readq ia64_mv.readq
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# define platform_readb_relaxed ia64_mv.readb_relaxed
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# define platform_readw_relaxed ia64_mv.readw_relaxed
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# define platform_readl_relaxed ia64_mv.readl_relaxed
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# define platform_readq_relaxed ia64_mv.readq_relaxed
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# define platform_migrate ia64_mv.migrate
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# endif
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/* __attribute__((__aligned__(16))) is required to make size of the
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* structure multiple of 16 bytes.
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* This will fillup the holes created because of section 3.3.1 in
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* Software Conventions guide.
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*/
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struct ia64_machine_vector {
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const char *name;
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ia64_mv_setup_t *setup;
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ia64_mv_cpu_init_t *cpu_init;
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ia64_mv_irq_init_t *irq_init;
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ia64_mv_send_ipi_t *send_ipi;
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ia64_mv_timer_interrupt_t *timer_interrupt;
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ia64_mv_global_tlb_purge_t *global_tlb_purge;
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ia64_mv_tlb_migrate_finish_t *tlb_migrate_finish;
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ia64_mv_dma_init *dma_init;
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ia64_mv_dma_alloc_coherent *dma_alloc_coherent;
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ia64_mv_dma_free_coherent *dma_free_coherent;
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ia64_mv_dma_map_single *dma_map_single;
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ia64_mv_dma_unmap_single *dma_unmap_single;
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ia64_mv_dma_map_sg *dma_map_sg;
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ia64_mv_dma_unmap_sg *dma_unmap_sg;
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ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu;
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ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu;
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ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device;
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ia64_mv_dma_sync_sg_for_device *dma_sync_sg_for_device;
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ia64_mv_dma_mapping_error *dma_mapping_error;
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ia64_mv_dma_supported *dma_supported;
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ia64_mv_local_vector_to_irq *local_vector_to_irq;
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ia64_mv_pci_get_legacy_mem_t *pci_get_legacy_mem;
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ia64_mv_pci_legacy_read_t *pci_legacy_read;
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ia64_mv_pci_legacy_write_t *pci_legacy_write;
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ia64_mv_inb_t *inb;
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ia64_mv_inw_t *inw;
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ia64_mv_inl_t *inl;
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ia64_mv_outb_t *outb;
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ia64_mv_outw_t *outw;
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ia64_mv_outl_t *outl;
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ia64_mv_mmiowb_t *mmiowb;
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ia64_mv_readb_t *readb;
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ia64_mv_readw_t *readw;
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ia64_mv_readl_t *readl;
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ia64_mv_readq_t *readq;
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ia64_mv_readb_relaxed_t *readb_relaxed;
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ia64_mv_readw_relaxed_t *readw_relaxed;
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ia64_mv_readl_relaxed_t *readl_relaxed;
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ia64_mv_readq_relaxed_t *readq_relaxed;
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ia64_mv_migrate_t *migrate;
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} __attribute__((__aligned__(16))); /* align attrib? see above comment */
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#define MACHVEC_INIT(name) \
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{ \
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#name, \
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platform_setup, \
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platform_cpu_init, \
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platform_irq_init, \
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platform_send_ipi, \
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platform_timer_interrupt, \
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platform_global_tlb_purge, \
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platform_tlb_migrate_finish, \
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platform_dma_init, \
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platform_dma_alloc_coherent, \
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platform_dma_free_coherent, \
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platform_dma_map_single, \
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platform_dma_unmap_single, \
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platform_dma_map_sg, \
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platform_dma_unmap_sg, \
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platform_dma_sync_single_for_cpu, \
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platform_dma_sync_sg_for_cpu, \
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platform_dma_sync_single_for_device, \
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platform_dma_sync_sg_for_device, \
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platform_dma_mapping_error, \
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platform_dma_supported, \
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platform_local_vector_to_irq, \
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platform_pci_get_legacy_mem, \
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platform_pci_legacy_read, \
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platform_pci_legacy_write, \
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platform_inb, \
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platform_inw, \
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platform_inl, \
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platform_outb, \
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platform_outw, \
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platform_outl, \
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platform_mmiowb, \
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platform_readb, \
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platform_readw, \
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platform_readl, \
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platform_readq, \
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platform_readb_relaxed, \
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platform_readw_relaxed, \
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platform_readl_relaxed, \
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platform_readq_relaxed, \
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platform_migrate, \
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}
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extern struct ia64_machine_vector ia64_mv;
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extern void machvec_init (const char *name);
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# else
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# error Unknown configuration. Update asm-ia64/machvec.h.
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# endif /* CONFIG_IA64_GENERIC */
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/*
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* Declare default routines which aren't declared anywhere else:
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*/
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extern ia64_mv_dma_init swiotlb_init;
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extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent;
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extern ia64_mv_dma_free_coherent swiotlb_free_coherent;
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extern ia64_mv_dma_map_single swiotlb_map_single;
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extern ia64_mv_dma_unmap_single swiotlb_unmap_single;
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extern ia64_mv_dma_map_sg swiotlb_map_sg;
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extern ia64_mv_dma_unmap_sg swiotlb_unmap_sg;
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extern ia64_mv_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu;
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extern ia64_mv_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu;
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extern ia64_mv_dma_sync_single_for_device swiotlb_sync_single_for_device;
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extern ia64_mv_dma_sync_sg_for_device swiotlb_sync_sg_for_device;
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extern ia64_mv_dma_mapping_error swiotlb_dma_mapping_error;
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extern ia64_mv_dma_supported swiotlb_dma_supported;
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/*
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* Define default versions so we can extend machvec for new platforms without having
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* to update the machvec files for all existing platforms.
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*/
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#ifndef platform_setup
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# define platform_setup machvec_setup
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#endif
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#ifndef platform_cpu_init
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# define platform_cpu_init machvec_noop
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#endif
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#ifndef platform_irq_init
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# define platform_irq_init machvec_noop
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#endif
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#ifndef platform_send_ipi
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# define platform_send_ipi ia64_send_ipi /* default to architected version */
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#endif
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#ifndef platform_timer_interrupt
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# define platform_timer_interrupt machvec_timer_interrupt
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#endif
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#ifndef platform_global_tlb_purge
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# define platform_global_tlb_purge ia64_global_tlb_purge /* default to architected version */
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#endif
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#ifndef platform_tlb_migrate_finish
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# define platform_tlb_migrate_finish machvec_noop_mm
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#endif
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#ifndef platform_dma_init
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# define platform_dma_init swiotlb_init
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#endif
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#ifndef platform_dma_alloc_coherent
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# define platform_dma_alloc_coherent swiotlb_alloc_coherent
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#endif
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#ifndef platform_dma_free_coherent
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# define platform_dma_free_coherent swiotlb_free_coherent
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#endif
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#ifndef platform_dma_map_single
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# define platform_dma_map_single swiotlb_map_single
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#endif
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#ifndef platform_dma_unmap_single
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# define platform_dma_unmap_single swiotlb_unmap_single
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#endif
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#ifndef platform_dma_map_sg
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# define platform_dma_map_sg swiotlb_map_sg
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#endif
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#ifndef platform_dma_unmap_sg
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# define platform_dma_unmap_sg swiotlb_unmap_sg
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#endif
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#ifndef platform_dma_sync_single_for_cpu
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# define platform_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu
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#endif
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#ifndef platform_dma_sync_sg_for_cpu
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# define platform_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu
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#endif
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#ifndef platform_dma_sync_single_for_device
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# define platform_dma_sync_single_for_device swiotlb_sync_single_for_device
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#endif
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#ifndef platform_dma_sync_sg_for_device
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# define platform_dma_sync_sg_for_device swiotlb_sync_sg_for_device
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#endif
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#ifndef platform_dma_mapping_error
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# define platform_dma_mapping_error swiotlb_dma_mapping_error
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#endif
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#ifndef platform_dma_supported
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# define platform_dma_supported swiotlb_dma_supported
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#endif
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#ifndef platform_local_vector_to_irq
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# define platform_local_vector_to_irq __ia64_local_vector_to_irq
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#endif
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#ifndef platform_pci_get_legacy_mem
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# define platform_pci_get_legacy_mem ia64_pci_get_legacy_mem
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#endif
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#ifndef platform_pci_legacy_read
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# define platform_pci_legacy_read ia64_pci_legacy_read
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#endif
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#ifndef platform_pci_legacy_write
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# define platform_pci_legacy_write ia64_pci_legacy_write
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#endif
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#ifndef platform_inb
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# define platform_inb __ia64_inb
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#endif
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#ifndef platform_inw
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# define platform_inw __ia64_inw
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#endif
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#ifndef platform_inl
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# define platform_inl __ia64_inl
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#endif
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#ifndef platform_outb
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# define platform_outb __ia64_outb
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#endif
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#ifndef platform_outw
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# define platform_outw __ia64_outw
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#endif
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#ifndef platform_outl
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# define platform_outl __ia64_outl
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#endif
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#ifndef platform_mmiowb
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# define platform_mmiowb __ia64_mmiowb
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#endif
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#ifndef platform_readb
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# define platform_readb __ia64_readb
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#endif
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#ifndef platform_readw
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# define platform_readw __ia64_readw
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#endif
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#ifndef platform_readl
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# define platform_readl __ia64_readl
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#endif
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#ifndef platform_readq
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# define platform_readq __ia64_readq
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#endif
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#ifndef platform_readb_relaxed
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# define platform_readb_relaxed __ia64_readb_relaxed
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#endif
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#ifndef platform_readw_relaxed
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# define platform_readw_relaxed __ia64_readw_relaxed
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#endif
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#ifndef platform_readl_relaxed
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# define platform_readl_relaxed __ia64_readl_relaxed
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#endif
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#ifndef platform_readq_relaxed
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# define platform_readq_relaxed __ia64_readq_relaxed
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#endif
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#ifndef platform_migrate
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# define platform_migrate machvec_noop_task
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#endif
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#endif /* _ASM_IA64_MACHVEC_H */
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