149 lines
4.1 KiB
C
149 lines
4.1 KiB
C
/*
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* BRIEF MODULE DESCRIPTION
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* Code to handle irqs on GT64120A boards
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* Derived from mips/orion and Cort <cort@fsmlabs.com>
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*
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* Copyright (C) 2000 RidgeRun, Inc.
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* Author: RidgeRun, Inc.
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* glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/module.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/timex.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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#include <linux/bitops.h>
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#include <asm/bootinfo.h>
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#include <asm/io.h>
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#include <asm/mipsregs.h>
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#include <asm/system.h>
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#include <asm/gt64120.h>
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending = read_c0_status() & read_c0_cause();
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if (pending & STATUSF_IP4) /* int2 hardware line (timer) */
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do_IRQ(4);
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else if (pending & STATUSF_IP2) /* int0 hardware line */
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do_IRQ(GT_INTA);
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else if (pending & STATUSF_IP5) /* int3 hardware line */
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do_IRQ(GT_INTD);
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else if (pending & STATUSF_IP6) /* int4 hardware line */
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do_IRQ(6);
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else if (pending & STATUSF_IP7) /* compare int */
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do_IRQ(7);
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else
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spurious_interrupt();
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}
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static void disable_ev64120_irq(unsigned int irq_nr)
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{
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unsigned long flags;
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local_irq_save(flags);
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if (irq_nr >= 8) { // All PCI interrupts are on line 5 or 2
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clear_c0_status(9 << 10);
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} else {
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clear_c0_status(1 << (irq_nr + 8));
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}
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local_irq_restore(flags);
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}
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static void enable_ev64120_irq(unsigned int irq_nr)
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{
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unsigned long flags;
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local_irq_save(flags);
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if (irq_nr >= 8) // All PCI interrupts are on line 5 or 2
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set_c0_status(9 << 10);
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else
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set_c0_status(1 << (irq_nr + 8));
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local_irq_restore(flags);
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}
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static unsigned int startup_ev64120_irq(unsigned int irq)
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{
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enable_ev64120_irq(irq);
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return 0; /* Never anything pending */
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}
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#define shutdown_ev64120_irq disable_ev64120_irq
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#define mask_and_ack_ev64120_irq disable_ev64120_irq
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static void end_ev64120_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_ev64120_irq(irq);
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}
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static struct irq_chip ev64120_irq_type = {
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.typename = "EV64120",
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.startup = startup_ev64120_irq,
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.shutdown = shutdown_ev64120_irq,
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.enable = enable_ev64120_irq,
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.disable = disable_ev64120_irq,
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.ack = mask_and_ack_ev64120_irq,
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.end = end_ev64120_irq,
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.set_affinity = NULL
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};
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void gt64120_irq_setup(void)
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{
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/*
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* Clear all of the interrupts while we change the able around a bit.
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*/
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clear_c0_status(ST0_IM);
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local_irq_disable();
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/*
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* Enable timer. Other interrupts will be enabled as they are
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* registered.
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*/
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set_c0_status(IE_IRQ2);
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}
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void __init arch_init_irq(void)
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{
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int i;
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/* Let's initialize our IRQ descriptors */
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for (i = 0; i < NR_IRQS; i++) {
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irq_desc[i].status = 0;
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irq_desc[i].chip = &no_irq_chip;
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irq_desc[i].action = NULL;
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irq_desc[i].depth = 0;
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spin_lock_init(&irq_desc[i].lock);
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}
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gt64120_irq_setup();
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}
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