d1bef4ed5f
This patch-queue improves the generic IRQ layer to be truly generic, by adding various abstractions and features to it, without impacting existing functionality. While the queue can be best described as "fix and improve everything in the generic IRQ layer that we could think of", and thus it consists of many smaller features and lots of cleanups, the one feature that stands out most is the new 'irq chip' abstraction. The irq-chip abstraction is about describing and coding and IRQ controller driver by mapping its raw hardware capabilities [and quirks, if needed] in a straightforward way, without having to think about "IRQ flow" (level/edge/etc.) type of details. This stands in contrast with the current 'irq-type' model of genirq architectures, which 'mixes' raw hardware capabilities with 'flow' details. The patchset supports both types of irq controller designs at once, and converts i386 and x86_64 to the new irq-chip design. As a bonus side-effect of the irq-chip approach, chained interrupt controllers (master/slave PIC constructs, etc.) are now supported by design as well. The end result of this patchset intends to be simpler architecture-level code and more consolidation between architectures. We reused many bits of code and many concepts from Russell King's ARM IRQ layer, the merging of which was one of the motivations for this patchset. This patch: rename desc->handler to desc->chip. Originally i did not want to do this, because it's a big patch. But having both "desc->handler", "desc->handle_irq" and "action->handler" caused a large degree of confusion and made the code appear alot less clean than it truly is. I have also attempted a dual approach as well by introducing a desc->chip alias - but that just wasnt robust enough and broke frequently. So lets get over with this quickly. The conversion was done automatically via scripts and converts all the code in the kernel. This renaming patch is the first one amongst the patches, so that the remaining patches can stay flexible and can be merged and split up without having some big monolithic patch act as a merge barrier. [akpm@osdl.org: build fix] [akpm@osdl.org: another build fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
800 lines
18 KiB
C
800 lines
18 KiB
C
/*
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* Copyright (C) 1998, 1999 Jesper Skov
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*
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* Basically what is needed to replace functionality found in
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* arch/m68k allowing Amiga drivers to work under APUS.
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* Bits of code and/or ideas from arch/m68k and arch/ppc files.
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*
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* TODO:
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* This file needs a *really* good cleanup. Restructure and optimize.
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* Make sure it can be compiled for non-APUS configs. Begin to move
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* Amiga specific stuff into mach/amiga.
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/initrd.h>
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#include <linux/seq_file.h>
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/* Needs INITSERIAL call in head.S! */
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#undef APUS_DEBUG
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#include <asm/bootinfo.h>
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#include <asm/setup.h>
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#include <asm/amigahw.h>
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#include <asm/amigaints.h>
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#include <asm/amigappc.h>
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#include <asm/pgtable.h>
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#include <asm/dma.h>
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#include <asm/machdep.h>
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#include <asm/time.h>
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unsigned long m68k_machtype;
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char debug_device[6] = "";
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extern void amiga_init_IRQ(void);
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extern void apus_setup_pci_ptrs(void);
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void (*mach_sched_init) (void (*handler)(int, void *, struct pt_regs *)) __initdata = NULL;
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/* machine dependent irq functions */
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void (*mach_init_IRQ) (void) __initdata = NULL;
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void (*(*mach_default_handler)[]) (int, void *, struct pt_regs *) = NULL;
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void (*mach_get_model) (char *model) = NULL;
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int (*mach_get_hardware_list) (char *buffer) = NULL;
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int (*mach_get_irq_list) (struct seq_file *, void *) = NULL;
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void (*mach_process_int) (int, struct pt_regs *) = NULL;
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/* machine dependent timer functions */
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unsigned long (*mach_gettimeoffset) (void);
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void (*mach_gettod) (int*, int*, int*, int*, int*, int*);
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int (*mach_hwclk) (int, struct hwclk_time*) = NULL;
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int (*mach_set_clock_mmss) (unsigned long) = NULL;
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void (*mach_reset)( void );
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long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
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#ifdef CONFIG_HEARTBEAT
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void (*mach_heartbeat) (int) = NULL;
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extern void apus_heartbeat (void);
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#endif
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extern unsigned long amiga_model;
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extern unsigned decrementer_count;/* count value for 1e6/HZ microseconds */
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extern unsigned count_period_num; /* 1 decrementer count equals */
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extern unsigned count_period_den; /* count_period_num / count_period_den us */
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int num_memory = 0;
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struct mem_info memory[NUM_MEMINFO];/* memory description */
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/* FIXME: Duplicate memory data to avoid conflicts with m68k shared code. */
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int m68k_realnum_memory = 0;
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struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
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struct mem_info ramdisk;
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extern void config_amiga(void);
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static int __60nsram = 0;
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/* for cpuinfo */
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static int __bus_speed = 0;
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static int __speed_test_failed = 0;
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/********************************************** COMPILE PROTECTION */
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/* Provide some stubs that links to Amiga specific functions.
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* This allows CONFIG_APUS to be removed from generic PPC files while
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* preventing link errors for other PPC targets.
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*/
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unsigned long apus_get_rtc_time(void)
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{
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#ifdef CONFIG_APUS
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extern unsigned long m68k_get_rtc_time(void);
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return m68k_get_rtc_time ();
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#else
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return 0;
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#endif
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}
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int apus_set_rtc_time(unsigned long nowtime)
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{
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#ifdef CONFIG_APUS
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extern int m68k_set_rtc_time(unsigned long nowtime);
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return m68k_set_rtc_time (nowtime);
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#else
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return 0;
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#endif
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}
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/*********************************************************** SETUP */
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/* From arch/m68k/kernel/setup.c. */
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void __init apus_setup_arch(void)
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{
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#ifdef CONFIG_APUS
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extern char cmd_line[];
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int i;
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char *p, *q;
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/* Let m68k-shared code know it should do the Amiga thing. */
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m68k_machtype = MACH_AMIGA;
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/* Parse the command line for arch-specific options.
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* For the m68k, this is currently only "debug=xxx" to enable printing
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* certain kernel messages to some machine-specific device. */
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for( p = cmd_line; p && *p; ) {
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i = 0;
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if (!strncmp( p, "debug=", 6 )) {
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strlcpy( debug_device, p+6, sizeof(debug_device) );
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if ((q = strchr( debug_device, ' ' ))) *q = 0;
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i = 1;
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} else if (!strncmp( p, "60nsram", 7 )) {
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APUS_WRITE (APUS_REG_WAITSTATE,
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REGWAITSTATE_SETRESET
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|REGWAITSTATE_PPCR
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|REGWAITSTATE_PPCW);
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__60nsram = 1;
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i = 1;
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}
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if (i) {
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/* option processed, delete it */
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if ((q = strchr( p, ' ' )))
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strcpy( p, q+1 );
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else
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*p = 0;
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} else {
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if ((p = strchr( p, ' ' ))) ++p;
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}
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}
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config_amiga();
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#if 0 /* Enable for logging - also include logging.o in Makefile rule */
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{
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#define LOG_SIZE 4096
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void* base;
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/* Throw away some memory - the P5 firmare stomps on top
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* of CHIP memory during bootup.
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*/
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amiga_chip_alloc(0x1000);
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base = amiga_chip_alloc(LOG_SIZE+sizeof(klog_data_t));
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LOG_INIT(base, base+sizeof(klog_data_t), LOG_SIZE);
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}
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#endif
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#endif
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}
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int
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apus_show_cpuinfo(struct seq_file *m)
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{
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extern int __map_without_bats;
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extern unsigned long powerup_PCI_present;
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seq_printf(m, "machine\t\t: Amiga\n");
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seq_printf(m, "bus speed\t: %d%s", __bus_speed,
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(__speed_test_failed) ? " [failed]\n" : "\n");
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seq_printf(m, "using BATs\t: %s\n",
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(__map_without_bats) ? "No" : "Yes");
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seq_printf(m, "ram speed\t: %dns\n", (__60nsram) ? 60 : 70);
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seq_printf(m, "PCI bridge\t: %s\n",
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(powerup_PCI_present) ? "Yes" : "No");
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return 0;
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}
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static void get_current_tb(unsigned long long *time)
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{
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__asm __volatile ("1:mftbu 4 \n\t"
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" mftb 5 \n\t"
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" mftbu 6 \n\t"
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" cmpw 4,6 \n\t"
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" bne 1b \n\t"
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" stw 4,0(%0)\n\t"
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" stw 5,4(%0)\n\t"
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:
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: "r" (time)
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: "r4", "r5", "r6");
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}
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void apus_calibrate_decr(void)
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{
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#ifdef CONFIG_APUS
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unsigned long freq;
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/* This algorithm for determining the bus speed was
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contributed by Ralph Schmidt. */
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unsigned long long start, stop;
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int bus_speed;
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int speed_test_failed = 0;
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{
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unsigned long loop = amiga_eclock / 10;
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get_current_tb (&start);
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while (loop--) {
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unsigned char tmp;
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tmp = ciaa.pra;
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}
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get_current_tb (&stop);
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}
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bus_speed = (((unsigned long)(stop-start))*10*4) / 1000000;
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if (AMI_1200 == amiga_model)
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bus_speed /= 2;
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if ((bus_speed >= 47) && (bus_speed < 53)) {
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bus_speed = 50;
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freq = 12500000;
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} else if ((bus_speed >= 57) && (bus_speed < 63)) {
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bus_speed = 60;
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freq = 15000000;
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} else if ((bus_speed >= 63) && (bus_speed < 69)) {
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bus_speed = 67;
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freq = 16666667;
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} else {
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printk ("APUS: Unable to determine bus speed (%d). "
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"Defaulting to 50MHz", bus_speed);
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bus_speed = 50;
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freq = 12500000;
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speed_test_failed = 1;
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}
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/* Ease diagnostics... */
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{
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extern int __map_without_bats;
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extern unsigned long powerup_PCI_present;
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printk ("APUS: BATs=%d, BUS=%dMHz",
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(__map_without_bats) ? 0 : 1,
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bus_speed);
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if (speed_test_failed)
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printk ("[FAILED - please report]");
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printk (", RAM=%dns, PCI bridge=%d\n",
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(__60nsram) ? 60 : 70,
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(powerup_PCI_present) ? 1 : 0);
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/* print a bit more if asked politely... */
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if (!(ciaa.pra & 0x40)){
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extern unsigned int bat_addrs[4][3];
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int b;
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for (b = 0; b < 4; ++b) {
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printk ("APUS: BAT%d ", b);
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printk ("%08x-%08x -> %08x\n",
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bat_addrs[b][0],
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bat_addrs[b][1],
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bat_addrs[b][2]);
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}
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}
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}
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printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
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freq/1000000, freq%1000000);
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tb_ticks_per_jiffy = freq / HZ;
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tb_to_us = mulhwu_scale_factor(freq, 1000000);
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__bus_speed = bus_speed;
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__speed_test_failed = speed_test_failed;
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#endif
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}
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void arch_gettod(int *year, int *mon, int *day, int *hour,
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int *min, int *sec)
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{
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#ifdef CONFIG_APUS
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if (mach_gettod)
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mach_gettod(year, mon, day, hour, min, sec);
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else
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*year = *mon = *day = *hour = *min = *sec = 0;
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#endif
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}
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/* for "kbd-reset" cmdline param */
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__init
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void kbd_reset_setup(char *str, int *ints)
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{
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}
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/*********************************************************** MEMORY */
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#define KMAP_MAX 32
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unsigned long kmap_chunks[KMAP_MAX*3];
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int kmap_chunk_count = 0;
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/* From pgtable.h */
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static __inline__ pte_t *my_find_pte(struct mm_struct *mm,unsigned long va)
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{
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pgd_t *dir = 0;
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pmd_t *pmd = 0;
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pte_t *pte = 0;
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va &= PAGE_MASK;
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dir = pgd_offset( mm, va );
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if (dir)
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{
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pmd = pmd_offset(dir, va & PAGE_MASK);
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if (pmd && pmd_present(*pmd))
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{
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pte = pte_offset(pmd, va);
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}
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}
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return pte;
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}
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/* Again simulating an m68k/mm/kmap.c function. */
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void kernel_set_cachemode( unsigned long address, unsigned long size,
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unsigned int cmode )
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{
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unsigned long mask, flags;
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switch (cmode)
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{
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case IOMAP_FULL_CACHING:
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mask = ~(_PAGE_NO_CACHE | _PAGE_GUARDED);
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flags = 0;
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break;
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case IOMAP_NOCACHE_SER:
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mask = ~0;
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flags = (_PAGE_NO_CACHE | _PAGE_GUARDED);
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break;
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default:
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panic ("kernel_set_cachemode() doesn't support mode %d\n",
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cmode);
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break;
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}
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size /= PAGE_SIZE;
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address &= PAGE_MASK;
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while (size--)
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{
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pte_t *pte;
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pte = my_find_pte(&init_mm, address);
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if ( !pte )
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{
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printk("pte NULL in kernel_set_cachemode()\n");
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return;
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}
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pte_val (*pte) &= mask;
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pte_val (*pte) |= flags;
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flush_tlb_page(find_vma(&init_mm,address),address);
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address += PAGE_SIZE;
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}
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}
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unsigned long mm_ptov (unsigned long paddr)
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{
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unsigned long ret;
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if (paddr < 16*1024*1024)
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ret = ZTWO_VADDR(paddr);
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else {
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int i;
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for (i = 0; i < kmap_chunk_count;){
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unsigned long phys = kmap_chunks[i++];
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unsigned long size = kmap_chunks[i++];
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unsigned long virt = kmap_chunks[i++];
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if (paddr >= phys
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&& paddr < (phys + size)){
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ret = virt + paddr - phys;
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goto exit;
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}
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}
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ret = (unsigned long) __va(paddr);
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}
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exit:
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#ifdef DEBUGPV
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printk ("PTOV(%lx)=%lx\n", paddr, ret);
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#endif
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return ret;
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}
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int mm_end_of_chunk (unsigned long addr, int len)
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{
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if (memory[0].addr + memory[0].size == addr + len)
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return 1;
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return 0;
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}
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/*********************************************************** CACHE */
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#define L1_CACHE_BYTES 32
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#define MAX_CACHE_SIZE 8192
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void cache_push(__u32 addr, int length)
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{
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addr = mm_ptov(addr);
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if (MAX_CACHE_SIZE < length)
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length = MAX_CACHE_SIZE;
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while(length > 0){
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__asm ("dcbf 0,%0\n\t"
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: : "r" (addr));
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addr += L1_CACHE_BYTES;
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length -= L1_CACHE_BYTES;
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}
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/* Also flush trailing block */
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__asm ("dcbf 0,%0\n\t"
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"sync \n\t"
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: : "r" (addr));
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}
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void cache_clear(__u32 addr, int length)
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{
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if (MAX_CACHE_SIZE < length)
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length = MAX_CACHE_SIZE;
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addr = mm_ptov(addr);
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__asm ("dcbf 0,%0\n\t"
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"sync \n\t"
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"icbi 0,%0 \n\t"
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"isync \n\t"
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: : "r" (addr));
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addr += L1_CACHE_BYTES;
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length -= L1_CACHE_BYTES;
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while(length > 0){
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__asm ("dcbf 0,%0\n\t"
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"sync \n\t"
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"icbi 0,%0 \n\t"
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"isync \n\t"
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: : "r" (addr));
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addr += L1_CACHE_BYTES;
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length -= L1_CACHE_BYTES;
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}
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__asm ("dcbf 0,%0\n\t"
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"sync \n\t"
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"icbi 0,%0 \n\t"
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"isync \n\t"
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: : "r" (addr));
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}
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/****************************************************** from setup.c */
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void
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apus_restart(char *cmd)
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{
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local_irq_disable();
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APUS_WRITE(APUS_REG_LOCK,
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REGLOCK_BLACKMAGICK1|REGLOCK_BLACKMAGICK2);
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APUS_WRITE(APUS_REG_LOCK,
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REGLOCK_BLACKMAGICK1|REGLOCK_BLACKMAGICK3);
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APUS_WRITE(APUS_REG_LOCK,
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REGLOCK_BLACKMAGICK2|REGLOCK_BLACKMAGICK3);
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APUS_WRITE(APUS_REG_SHADOW, REGSHADOW_SELFRESET);
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APUS_WRITE(APUS_REG_RESET, REGRESET_AMIGARESET);
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for(;;);
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}
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void
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apus_power_off(void)
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{
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for (;;);
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}
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void
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apus_halt(void)
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{
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apus_restart(NULL);
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}
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/****************************************************** IRQ stuff */
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static unsigned char last_ipl[8];
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int apus_get_irq(struct pt_regs* regs)
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{
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unsigned char ipl_emu, mask;
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unsigned int level;
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|
|
APUS_READ(APUS_IPL_EMU, ipl_emu);
|
|
level = (ipl_emu >> 3) & IPLEMU_IPLMASK;
|
|
mask = IPLEMU_SETRESET|IPLEMU_DISABLEINT|level;
|
|
level ^= 7;
|
|
|
|
/* Save previous IPL value */
|
|
if (last_ipl[level])
|
|
return -2;
|
|
last_ipl[level] = ipl_emu;
|
|
|
|
/* Set to current IPL value */
|
|
APUS_WRITE(APUS_IPL_EMU, mask);
|
|
APUS_WRITE(APUS_IPL_EMU, IPLEMU_DISABLEINT|level);
|
|
|
|
|
|
#ifdef __INTERRUPT_DEBUG
|
|
printk("<%d:%d>", level, ~ipl_emu & IPLEMU_IPLMASK);
|
|
#endif
|
|
return level + IRQ_AMIGA_AUTO;
|
|
}
|
|
|
|
void apus_end_irq(unsigned int irq)
|
|
{
|
|
unsigned char ipl_emu;
|
|
unsigned int level = irq - IRQ_AMIGA_AUTO;
|
|
#ifdef __INTERRUPT_DEBUG
|
|
printk("{%d}", ~last_ipl[level] & IPLEMU_IPLMASK);
|
|
#endif
|
|
/* Restore IPL to the previous value */
|
|
ipl_emu = last_ipl[level] & IPLEMU_IPLMASK;
|
|
APUS_WRITE(APUS_IPL_EMU, IPLEMU_SETRESET|IPLEMU_DISABLEINT|ipl_emu);
|
|
last_ipl[level] = 0;
|
|
ipl_emu ^= 7;
|
|
APUS_WRITE(APUS_IPL_EMU, IPLEMU_DISABLEINT|ipl_emu);
|
|
}
|
|
|
|
/****************************************************** debugging */
|
|
|
|
/* some serial hardware definitions */
|
|
#define SDR_OVRUN (1<<15)
|
|
#define SDR_RBF (1<<14)
|
|
#define SDR_TBE (1<<13)
|
|
#define SDR_TSRE (1<<12)
|
|
|
|
#define AC_SETCLR (1<<15)
|
|
#define AC_UARTBRK (1<<11)
|
|
|
|
#define SER_DTR (1<<7)
|
|
#define SER_RTS (1<<6)
|
|
#define SER_DCD (1<<5)
|
|
#define SER_CTS (1<<4)
|
|
#define SER_DSR (1<<3)
|
|
|
|
static __inline__ void ser_RTSon(void)
|
|
{
|
|
ciab.pra &= ~SER_RTS; /* active low */
|
|
}
|
|
|
|
int __debug_ser_out( unsigned char c )
|
|
{
|
|
amiga_custom.serdat = c | 0x100;
|
|
mb();
|
|
while (!(amiga_custom.serdatr & 0x2000))
|
|
barrier();
|
|
return 1;
|
|
}
|
|
|
|
unsigned char __debug_ser_in( void )
|
|
{
|
|
unsigned char c;
|
|
|
|
/* XXX: is that ok?? derived from amiga_ser.c... */
|
|
while( !(amiga_custom.intreqr & IF_RBF) )
|
|
barrier();
|
|
c = amiga_custom.serdatr;
|
|
/* clear the interrupt, so that another character can be read */
|
|
amiga_custom.intreq = IF_RBF;
|
|
return c;
|
|
}
|
|
|
|
int __debug_serinit( void )
|
|
{
|
|
unsigned long flags;
|
|
|
|
local_irq_save(flags);
|
|
|
|
/* turn off Rx and Tx interrupts */
|
|
amiga_custom.intena = IF_RBF | IF_TBE;
|
|
|
|
/* clear any pending interrupt */
|
|
amiga_custom.intreq = IF_RBF | IF_TBE;
|
|
|
|
local_irq_restore(flags);
|
|
|
|
/*
|
|
* set the appropriate directions for the modem control flags,
|
|
* and clear RTS and DTR
|
|
*/
|
|
ciab.ddra |= (SER_DTR | SER_RTS); /* outputs */
|
|
ciab.ddra &= ~(SER_DCD | SER_CTS | SER_DSR); /* inputs */
|
|
|
|
#ifdef CONFIG_KGDB
|
|
/* turn Rx interrupts on for GDB */
|
|
amiga_custom.intena = IF_SETCLR | IF_RBF;
|
|
ser_RTSon();
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
void __debug_print_hex(unsigned long x)
|
|
{
|
|
int i;
|
|
char hexchars[] = "0123456789ABCDEF";
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
__debug_ser_out(hexchars[(x >> 28) & 15]);
|
|
x <<= 4;
|
|
}
|
|
__debug_ser_out('\n');
|
|
__debug_ser_out('\r');
|
|
}
|
|
|
|
void __debug_print_string(char* s)
|
|
{
|
|
unsigned char c;
|
|
while((c = *s++))
|
|
__debug_ser_out(c);
|
|
__debug_ser_out('\n');
|
|
__debug_ser_out('\r');
|
|
}
|
|
|
|
static void apus_progress(char *s, unsigned short value)
|
|
{
|
|
__debug_print_string(s);
|
|
}
|
|
|
|
/****************************************************** init */
|
|
|
|
/* The number of spurious interrupts */
|
|
volatile unsigned int num_spurious;
|
|
|
|
extern struct irqaction amiga_sys_irqaction[AUTO_IRQS];
|
|
|
|
|
|
extern void amiga_enable_irq(unsigned int irq);
|
|
extern void amiga_disable_irq(unsigned int irq);
|
|
|
|
struct hw_interrupt_type amiga_sys_irqctrl = {
|
|
.typename = "Amiga IPL",
|
|
.end = apus_end_irq,
|
|
};
|
|
|
|
struct hw_interrupt_type amiga_irqctrl = {
|
|
.typename = "Amiga ",
|
|
.enable = amiga_enable_irq,
|
|
.disable = amiga_disable_irq,
|
|
};
|
|
|
|
#define HARDWARE_MAPPED_SIZE (512*1024)
|
|
unsigned long __init apus_find_end_of_memory(void)
|
|
{
|
|
int shadow = 0;
|
|
unsigned long total;
|
|
|
|
/* The memory size reported by ADOS excludes the 512KB
|
|
reserved for PPC exception registers and possibly 512KB
|
|
containing a shadow of the ADOS ROM. */
|
|
{
|
|
unsigned long size = memory[0].size;
|
|
|
|
/* If 2MB aligned, size was probably user
|
|
specified. We can't tell anything about shadowing
|
|
in this case so skip shadow assignment. */
|
|
if (0 != (size & 0x1fffff)){
|
|
/* Align to 512KB to ensure correct handling
|
|
of both memfile and system specified
|
|
sizes. */
|
|
size = ((size+0x0007ffff) & 0xfff80000);
|
|
/* If memory is 1MB aligned, assume
|
|
shadowing. */
|
|
shadow = !(size & 0x80000);
|
|
}
|
|
|
|
/* Add the chunk that ADOS does not see. by aligning
|
|
the size to the nearest 2MB limit upwards. */
|
|
memory[0].size = ((size+0x001fffff) & 0xffe00000);
|
|
}
|
|
|
|
ppc_memstart = memory[0].addr;
|
|
ppc_memoffset = PAGE_OFFSET - PPC_MEMSTART;
|
|
total = memory[0].size;
|
|
|
|
/* Remove the memory chunks that are controlled by special
|
|
Phase5 hardware. */
|
|
|
|
/* Remove the upper 512KB if it contains a shadow of
|
|
the ADOS ROM. FIXME: It might be possible to
|
|
disable this shadow HW. Check the booter
|
|
(ppc_boot.c) */
|
|
if (shadow)
|
|
total -= HARDWARE_MAPPED_SIZE;
|
|
|
|
/* Remove the upper 512KB where the PPC exception
|
|
vectors are mapped. */
|
|
total -= HARDWARE_MAPPED_SIZE;
|
|
|
|
/* Linux/APUS only handles one block of memory -- the one on
|
|
the PowerUP board. Other system memory is horrible slow in
|
|
comparison. The user can use other memory for swapping
|
|
using the z2ram device. */
|
|
return total;
|
|
}
|
|
|
|
static void __init
|
|
apus_map_io(void)
|
|
{
|
|
/* Map PPC exception vectors. */
|
|
io_block_mapping(0xfff00000, 0xfff00000, 0x00020000, _PAGE_KERNEL);
|
|
/* Map chip and ZorroII memory */
|
|
io_block_mapping(zTwoBase, 0x00000000, 0x01000000, _PAGE_IO);
|
|
}
|
|
|
|
__init
|
|
void apus_init_IRQ(void)
|
|
{
|
|
struct irqaction *action;
|
|
int i;
|
|
|
|
#ifdef CONFIG_PCI
|
|
apus_setup_pci_ptrs();
|
|
#endif
|
|
|
|
for ( i = 0 ; i < AMI_IRQS; i++ ) {
|
|
irq_desc[i].status = IRQ_LEVEL;
|
|
if (i < IRQ_AMIGA_AUTO) {
|
|
irq_desc[i].chip = &amiga_irqctrl;
|
|
} else {
|
|
irq_desc[i].chip = &amiga_sys_irqctrl;
|
|
action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO];
|
|
if (action->name)
|
|
setup_irq(i, action);
|
|
}
|
|
}
|
|
|
|
amiga_init_IRQ();
|
|
|
|
}
|
|
|
|
__init
|
|
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|
unsigned long r6, unsigned long r7)
|
|
{
|
|
extern int parse_bootinfo(const struct bi_record *);
|
|
extern char _end[];
|
|
|
|
/* Parse bootinfo. The bootinfo is located right after
|
|
the kernel bss */
|
|
parse_bootinfo((const struct bi_record *)&_end);
|
|
#ifdef CONFIG_BLK_DEV_INITRD
|
|
/* Take care of initrd if we have one. Use data from
|
|
bootinfo to avoid the need to initialize PPC
|
|
registers when kernel is booted via a PPC reset. */
|
|
if ( ramdisk.addr ) {
|
|
initrd_start = (unsigned long) __va(ramdisk.addr);
|
|
initrd_end = (unsigned long)
|
|
__va(ramdisk.size + ramdisk.addr);
|
|
}
|
|
#endif /* CONFIG_BLK_DEV_INITRD */
|
|
|
|
ISA_DMA_THRESHOLD = 0x00ffffff;
|
|
|
|
ppc_md.setup_arch = apus_setup_arch;
|
|
ppc_md.show_cpuinfo = apus_show_cpuinfo;
|
|
ppc_md.init_IRQ = apus_init_IRQ;
|
|
ppc_md.get_irq = apus_get_irq;
|
|
|
|
#ifdef CONFIG_HEARTBEAT
|
|
ppc_md.heartbeat = apus_heartbeat;
|
|
ppc_md.heartbeat_count = 1;
|
|
#endif
|
|
#ifdef APUS_DEBUG
|
|
__debug_serinit();
|
|
ppc_md.progress = apus_progress;
|
|
#endif
|
|
ppc_md.init = NULL;
|
|
|
|
ppc_md.restart = apus_restart;
|
|
ppc_md.power_off = apus_power_off;
|
|
ppc_md.halt = apus_halt;
|
|
|
|
ppc_md.time_init = NULL;
|
|
ppc_md.set_rtc_time = apus_set_rtc_time;
|
|
ppc_md.get_rtc_time = apus_get_rtc_time;
|
|
ppc_md.calibrate_decr = apus_calibrate_decr;
|
|
|
|
ppc_md.find_end_of_memory = apus_find_end_of_memory;
|
|
ppc_md.setup_io_mappings = apus_map_io;
|
|
}
|