76 lines
1.6 KiB
ArmAsm
76 lines
1.6 KiB
ArmAsm
/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: jsun@mvista.com or jsun@junsun.net
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*
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* First-level interrupt dispatcher for ddb5477
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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#include <asm/ddb5xxx/ddb5477.h>
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/*
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* first level interrupt dispatcher for ocelot board -
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* We check for the timer first, then check PCI ints A and D.
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* Then check for serial IRQ and fall through.
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*/
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.align 5
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NESTED(ddb5477_handle_int, PT_SIZE, sp)
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SAVE_ALL
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CLI
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.set at
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.set noreorder
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mfc0 t0, CP0_CAUSE
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mfc0 t2, CP0_STATUS
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and t0, t2
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andi t1, t0, STATUSF_IP7 /* cpu timer */
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bnez t1, ll_cputimer_irq
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andi t1, t0, (STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 )
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bnez t1, ll_vrc5477_irq
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andi t1, t0, STATUSF_IP0 /* software int 0 */
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bnez t1, ll_cpu_ip0
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andi t1, t0, STATUSF_IP1 /* software int 1 */
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bnez t1, ll_cpu_ip1
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nop
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.set reorder
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/* wrong alarm or masked ... */
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jal spurious_interrupt
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j ret_from_irq
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END(ddb5477_handle_int)
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.align 5
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ll_vrc5477_irq:
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move a0, sp
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jal vrc5477_irq_dispatch
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j ret_from_irq
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ll_cputimer_irq:
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li a0, CPU_IRQ_BASE + 7
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip0:
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li a0, CPU_IRQ_BASE + 0
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip1:
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li a0, CPU_IRQ_BASE + 1
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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