1fa9be72b5
For systems where the core cycles are not a usable tick source (like SMP or cycles gets updated), enable gptimer0 as an alternative. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
96 lines
1.6 KiB
Plaintext
96 lines
1.6 KiB
Plaintext
if (BF533 || BF532 || BF531)
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source "arch/blackfin/mach-bf533/boards/Kconfig"
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menu "BF533/2/1 Specific Configuration"
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comment "Interrupt Priority Assignment"
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menu "Priority"
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config UART_ERROR
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int "UART ERROR"
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default 7
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config SPORT0_ERROR
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int "SPORT0 ERROR"
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default 7
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config SPI_ERROR
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int "SPI ERROR"
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default 7
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config SPORT1_ERROR
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int "SPORT1 ERROR"
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default 7
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config PPI_ERROR
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int "PPI ERROR"
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default 7
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config DMA_ERROR
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int "DMA ERROR"
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default 7
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config PLLWAKE_ERROR
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int "PLL WAKEUP ERROR"
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default 7
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config RTC_ERROR
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int "RTC ERROR"
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default 8
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config DMA0_PPI
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int "DMA0 PPI"
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default 8
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config DMA1_SPORT0RX
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int "DMA1 (SPORT0 RX)"
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default 9
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config DMA2_SPORT0TX
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int "DMA2 (SPORT0 TX)"
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default 9
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config DMA3_SPORT1RX
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int "DMA3 (SPORT1 RX)"
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default 9
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config DMA4_SPORT1TX
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int "DMA4 (SPORT1 TX)"
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default 9
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config DMA5_SPI
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int "DMA5 (SPI)"
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default 10
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config DMA6_UARTRX
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int "DMA6 (UART0 RX)"
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default 10
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config DMA7_UARTTX
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int "DMA7 (UART0 TX)"
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default 10
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config TIMER0
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int "TIMER0"
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default 7 if TICKSOURCE_GPTMR0
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default 8
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config TIMER1
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int "TIMER1"
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default 11
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config TIMER2
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int "TIMER2"
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default 11
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config PFA
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int "PF Interrupt A"
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default 12
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config PFB
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int "PF Interrupt B"
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default 12
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config MEMDMA0
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int "MEMORY DMA0"
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default 13
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config MEMDMA1
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int "MEMORY DMA1"
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default 13
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config WDTIMER
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int "WATCH DOG TIMER"
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default 13
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help
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Enter the priority numbers between 7-13 ONLY. Others are Reserved.
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This applies to all the above. It is not recommended to assign the
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highest priority number 7 to UART or any other device.
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endmenu
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endmenu
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endif
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