64 lines
1.4 KiB
C
64 lines
1.4 KiB
C
#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/cpumask.h>
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#include <linux/init.h>
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#include <asm/mpspec.h>
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#include <asm/pda.h>
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#include <asm/thread_info.h>
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extern cpumask_t cpu_initialized;
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extern cpumask_t cpu_callin_map;
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extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
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void *info, int wait);
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#ifdef CONFIG_SMP
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#define raw_smp_processor_id() read_pda(cpunumber)
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#define stack_smp_processor_id() \
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({ \
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struct thread_info *ti; \
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asm("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
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ti->cpu; \
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})
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/*
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* On x86 all CPUs are mapped 1:1 to the APIC space. This simplifies
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* scheduling and IPI sending and compresses data structures.
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*/
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static inline int num_booting_cpus(void)
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{
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return cpus_weight(cpu_callout_map);
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}
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#else /* CONFIG_SMP */
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#define stack_smp_processor_id() 0
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#endif /* !CONFIG_SMP */
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#define safe_smp_processor_id() smp_processor_id()
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static inline int logical_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
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}
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#include <mach_apicdef.h>
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID));
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}
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#endif
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