1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
300 lines
8.1 KiB
C
300 lines
8.1 KiB
C
/*
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* Universal Host Controller Interface driver for USB.
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*
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* Maintainer: Alan Stern <stern@rowland.harvard.edu>
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*
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* (C) Copyright 1999 Linus Torvalds
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* (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
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* (C) Copyright 1999 Randy Dunlap
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* (C) Copyright 1999 Georg Acher, acher@in.tum.de
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* (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
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* (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
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* (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
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*/
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static __u8 root_hub_hub_des[] =
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{
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0x09, /* __u8 bLength; */
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0x29, /* __u8 bDescriptorType; Hub-descriptor */
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0x02, /* __u8 bNbrPorts; */
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0x0a, /* __u16 wHubCharacteristics; */
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0x00, /* (per-port OC, no power switching) */
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0x01, /* __u8 bPwrOn2pwrGood; 2ms */
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0x00, /* __u8 bHubContrCurrent; 0 mA */
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0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
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0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
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};
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#define UHCI_RH_MAXCHILD 7
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/* must write as zeroes */
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#define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
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/* status change bits: nonzero writes will clear */
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#define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
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static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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int port;
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*buf = 0;
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for (port = 0; port < uhci->rh_numports; ++port) {
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if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & RWC_BITS) ||
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test_bit(port, &uhci->port_c_suspend))
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*buf |= (1 << (port + 1));
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}
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if (*buf && uhci->state == UHCI_SUSPENDED)
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uhci->resume_detect = 1;
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return !!*buf;
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}
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#define OK(x) len = (x); break
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#define CLR_RH_PORTSTAT(x) \
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status = inw(port_addr); \
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status &= ~(RWC_BITS|WZ_BITS); \
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status &= ~(x); \
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status |= RWC_BITS & (x); \
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outw(status, port_addr)
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#define SET_RH_PORTSTAT(x) \
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status = inw(port_addr); \
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status |= (x); \
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status &= ~(RWC_BITS|WZ_BITS); \
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outw(status, port_addr)
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/* UHCI controllers don't automatically stop resume signalling after 20 msec,
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* so we have to poll and check timeouts in order to take care of it.
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*/
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static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
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unsigned long port_addr)
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{
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int status;
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if (test_bit(port, &uhci->suspended_ports)) {
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CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD);
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clear_bit(port, &uhci->suspended_ports);
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clear_bit(port, &uhci->resuming_ports);
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set_bit(port, &uhci->port_c_suspend);
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/* The controller won't actually turn off the RD bit until
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* it has had a chance to send a low-speed EOP sequence,
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* which takes 3 bit times (= 2 microseconds). We'll delay
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* slightly longer for good luck. */
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udelay(4);
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}
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}
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static void uhci_check_ports(struct uhci_hcd *uhci)
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{
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unsigned int port;
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unsigned long port_addr;
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int status;
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for (port = 0; port < uhci->rh_numports; ++port) {
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port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
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status = inw(port_addr);
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if (unlikely(status & USBPORTSC_PR)) {
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if (time_after_eq(jiffies, uhci->ports_timeout)) {
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CLR_RH_PORTSTAT(USBPORTSC_PR);
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udelay(10);
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/* If the port was enabled before, turning
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* reset on caused a port enable change.
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* Turning reset off causes a port connect
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* status change. Clear these changes. */
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CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
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SET_RH_PORTSTAT(USBPORTSC_PE);
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}
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}
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if (unlikely(status & USBPORTSC_RD)) {
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if (!test_bit(port, &uhci->resuming_ports)) {
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/* Port received a wakeup request */
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set_bit(port, &uhci->resuming_ports);
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uhci->ports_timeout = jiffies +
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msecs_to_jiffies(20);
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} else if (time_after_eq(jiffies,
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uhci->ports_timeout)) {
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uhci_finish_suspend(uhci, port, port_addr);
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}
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}
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}
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}
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/* size of returned buffer is part of USB spec */
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static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
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u16 wIndex, char *buf, u16 wLength)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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int status, lstatus, retval = 0, len = 0;
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unsigned int port = wIndex - 1;
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unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
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u16 wPortChange, wPortStatus;
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unsigned long flags;
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spin_lock_irqsave(&uhci->lock, flags);
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switch (typeReq) {
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case GetHubStatus:
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*(__le32 *)buf = cpu_to_le32(0);
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OK(4); /* hub power */
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case GetPortStatus:
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if (port >= uhci->rh_numports)
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goto err;
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uhci_check_ports(uhci);
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status = inw(port_addr);
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/* Intel controllers report the OverCurrent bit active on.
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* VIA controllers report it active off, so we'll adjust the
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* bit value. (It's not standardized in the UHCI spec.)
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*/
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if (to_pci_dev(hcd->self.controller)->vendor ==
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PCI_VENDOR_ID_VIA)
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status ^= USBPORTSC_OC;
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/* UHCI doesn't support C_RESET (always false) */
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wPortChange = lstatus = 0;
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if (status & USBPORTSC_CSC)
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wPortChange |= USB_PORT_STAT_C_CONNECTION;
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if (status & USBPORTSC_PEC)
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wPortChange |= USB_PORT_STAT_C_ENABLE;
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if (status & USBPORTSC_OCC)
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wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
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if (test_bit(port, &uhci->port_c_suspend)) {
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wPortChange |= USB_PORT_STAT_C_SUSPEND;
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lstatus |= 1;
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}
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if (test_bit(port, &uhci->suspended_ports))
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lstatus |= 2;
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if (test_bit(port, &uhci->resuming_ports))
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lstatus |= 4;
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/* UHCI has no power switching (always on) */
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wPortStatus = USB_PORT_STAT_POWER;
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if (status & USBPORTSC_CCS)
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wPortStatus |= USB_PORT_STAT_CONNECTION;
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if (status & USBPORTSC_PE) {
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wPortStatus |= USB_PORT_STAT_ENABLE;
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if (status & (USBPORTSC_SUSP | USBPORTSC_RD))
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wPortStatus |= USB_PORT_STAT_SUSPEND;
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}
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if (status & USBPORTSC_OC)
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wPortStatus |= USB_PORT_STAT_OVERCURRENT;
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if (status & USBPORTSC_PR)
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wPortStatus |= USB_PORT_STAT_RESET;
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if (status & USBPORTSC_LSDA)
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wPortStatus |= USB_PORT_STAT_LOW_SPEED;
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if (wPortChange)
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dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
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wIndex, status, lstatus);
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*(__le16 *)buf = cpu_to_le16(wPortStatus);
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*(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
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OK(4);
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case SetHubFeature: /* We don't implement these */
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case ClearHubFeature:
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switch (wValue) {
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case C_HUB_OVER_CURRENT:
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case C_HUB_LOCAL_POWER:
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OK(0);
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default:
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goto err;
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}
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break;
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case SetPortFeature:
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if (port >= uhci->rh_numports)
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goto err;
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switch (wValue) {
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case USB_PORT_FEAT_SUSPEND:
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set_bit(port, &uhci->suspended_ports);
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SET_RH_PORTSTAT(USBPORTSC_SUSP);
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OK(0);
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case USB_PORT_FEAT_RESET:
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SET_RH_PORTSTAT(USBPORTSC_PR);
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/* Reset terminates Resume signalling */
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uhci_finish_suspend(uhci, port, port_addr);
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/* USB v2.0 7.1.7.5 */
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uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
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OK(0);
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case USB_PORT_FEAT_POWER:
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/* UHCI has no power switching */
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OK(0);
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default:
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goto err;
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}
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break;
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case ClearPortFeature:
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if (port >= uhci->rh_numports)
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goto err;
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switch (wValue) {
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case USB_PORT_FEAT_ENABLE:
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CLR_RH_PORTSTAT(USBPORTSC_PE);
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/* Disable terminates Resume signalling */
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uhci_finish_suspend(uhci, port, port_addr);
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OK(0);
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case USB_PORT_FEAT_C_ENABLE:
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CLR_RH_PORTSTAT(USBPORTSC_PEC);
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OK(0);
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case USB_PORT_FEAT_SUSPEND:
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if (test_bit(port, &uhci->suspended_ports) &&
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!test_and_set_bit(port,
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&uhci->resuming_ports)) {
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SET_RH_PORTSTAT(USBPORTSC_RD);
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/* The controller won't allow RD to be set
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* if the port is disabled. When this happens
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* just skip the Resume signalling.
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*/
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if (!(inw(port_addr) & USBPORTSC_RD))
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uhci_finish_suspend(uhci, port,
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port_addr);
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else
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/* USB v2.0 7.1.7.7 */
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uhci->ports_timeout = jiffies +
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msecs_to_jiffies(20);
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}
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OK(0);
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case USB_PORT_FEAT_C_SUSPEND:
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clear_bit(port, &uhci->port_c_suspend);
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OK(0);
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case USB_PORT_FEAT_POWER:
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/* UHCI has no power switching */
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goto err;
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case USB_PORT_FEAT_C_CONNECTION:
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CLR_RH_PORTSTAT(USBPORTSC_CSC);
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OK(0);
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case USB_PORT_FEAT_C_OVER_CURRENT:
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CLR_RH_PORTSTAT(USBPORTSC_OCC);
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OK(0);
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case USB_PORT_FEAT_C_RESET:
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/* this driver won't report these */
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OK(0);
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default:
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goto err;
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}
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break;
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case GetHubDescriptor:
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len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
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memcpy(buf, root_hub_hub_des, len);
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if (len > 2)
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buf[2] = uhci->rh_numports;
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OK(len);
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default:
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err:
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retval = -EPIPE;
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}
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spin_unlock_irqrestore(&uhci->lock, flags);
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return retval;
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}
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