70fe3af840
The Power ISA 2.06 spec introduces a standard MMU programming model that is based on the Freescale Book-E MMU programing model. The Freescale version is pretty backwards compatiable with the ISA 2.06 definition so we are starting to refactor some of the Freescale code so it can be easily shared. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
#ifndef _ASM_POWERPC_MMU_H_
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#define _ASM_POWERPC_MMU_H_
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#ifdef __KERNEL__
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#include <asm/asm-compat.h>
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#include <asm/feature-fixups.h>
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/*
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* MMU features bit definitions
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*/
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/*
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* First half is MMU families
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*/
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#define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
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#define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
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#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
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#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
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#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
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/*
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* This is individual features
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*/
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/* Enable use of high BAT registers */
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#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
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/* Enable >32-bit physical addresses on 32-bit processor, only used
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* by CONFIG_6xx currently as BookE supports that from day 1
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*/
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#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
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/* Enable use of broadcast TLB invalidations. We don't always set it
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* on processors that support it due to other constraints with the
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* use of such invalidations
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*/
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#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
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/* Enable use of tlbilx invalidate-by-PID variant.
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*/
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#define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000)
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/* This indicates that the processor cannot handle multiple outstanding
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* broadcast tlbivax or tlbsync. This makes the code use a spinlock
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* around such invalidate forms.
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*/
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#define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000)
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#ifndef __ASSEMBLY__
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#include <asm/cputable.h>
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static inline int mmu_has_feature(unsigned long feature)
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{
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return (cur_cpu_spec->mmu_features & feature);
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}
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extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
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#endif /* !__ASSEMBLY__ */
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#ifdef CONFIG_PPC64
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/* 64-bit classic hash table MMU */
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# include <asm/mmu-hash64.h>
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#elif defined(CONFIG_PPC_STD_MMU)
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/* 32-bit classic hash table MMU */
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# include <asm/mmu-hash32.h>
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#elif defined(CONFIG_40x)
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/* 40x-style software loaded TLB */
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# include <asm/mmu-40x.h>
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#elif defined(CONFIG_44x)
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/* 44x-style software loaded TLB */
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# include <asm/mmu-44x.h>
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#elif defined(CONFIG_PPC_BOOK3E_MMU)
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/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
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# include <asm/mmu-book3e.h>
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#elif defined (CONFIG_PPC_8xx)
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/* Motorola/Freescale 8xx software loaded TLB */
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# include <asm/mmu-8xx.h>
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_MMU_H_ */
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