android_kernel_xiaomi_sm8350/drivers/char/drm
David S. Miller b82f87f6d4 [DRM]: Delete sparc64 FFB driver code that never gets built.
The Kconfig bits were removed long ago, so we should kill off the
driver too.

Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-26 21:49:11 -07:00
..
ati_pcigart.c
drm_agpsupport.c
drm_auth.c
drm_bufs.c drm: Allow for 44 bit user-tokens (or drm_file offsets) 2007-02-08 16:14:05 +11:00
drm_context.c
drm_core.h drm: add support for secondary vertical blank interrupt to DRM core 2006-12-07 15:53:28 +11:00
drm_dma.c
drm_drawable.c drm: drm_rmdraw: Declare id and idx as signed so testing for < 0 works as intended. 2006-12-07 15:53:29 +11:00
drm_drv.c [PATCH] mark struct file_operations const 3 2007-02-12 09:48:45 -08:00
drm_fops.c
drm_hashtab.c
drm_hashtab.h
drm_ioc32.c [PATCH] struct path: convert drm 2006-12-08 08:28:44 -08:00
drm_ioctl.c
drm_irq.c drm: Core vsync: Don't clobber target sequence number when scheduling signal. 2006-12-07 15:53:29 +11:00
drm_lock.c drm: make kernel context switch same as for drm git tree. 2006-12-19 17:49:44 +11:00
drm_memory_debug.h drm: remove drm_ioremap and drm_ioremapfree 2007-02-08 13:24:26 +11:00
drm_memory.c drm: remove drm_ioremap and drm_ioremapfree 2007-02-08 13:24:26 +11:00
drm_memory.h drm: remove drm_ioremap and drm_ioremapfree 2007-02-08 13:24:26 +11:00
drm_mm.c drm: update core memory manager from git drm tree 2007-02-08 13:24:26 +11:00
drm_os_linux.h IRQ: Maintain regs pointer globally rather than passing to IRQ handlers 2006-10-05 15:10:12 +01:00
drm_pci.c
drm_pciids.h via: add some new chipsets 2007-02-08 13:24:25 +11:00
drm_proc.c drm: Allow for 44 bit user-tokens (or drm_file offsets) 2007-02-08 16:14:05 +11:00
drm_sarea.h
drm_scatter.c
drm_sman.c drm: update core memory manager from git drm tree 2007-02-08 13:24:26 +11:00
drm_sman.h
drm_stub.c DRM: handle pci_enable_device failure 2006-12-11 18:28:52 +11:00
drm_sysfs.c drm: fix return value check 2006-12-11 18:28:45 +11:00
drm_vm.c drm: Allow for 44 bit user-tokens (or drm_file offsets) 2007-02-08 16:14:05 +11:00
drm.h drm: add flag for mapping PCI DMA buffers read-only. 2006-12-07 15:53:31 +11:00
drmP.h drm: update core memory manager from git drm tree 2007-02-08 13:24:26 +11:00
i810_dma.c [PATCH] mark struct file_operations const 3 2007-02-12 09:48:45 -08:00
i810_drm.h
i810_drv.c
i810_drv.h i810/i830: use drm_core_ioremap instead of drm_ioremap 2007-02-08 13:24:26 +11:00
i830_dma.c [PATCH] mark struct file_operations const 3 2007-02-12 09:48:45 -08:00
i830_drm.h
i830_drv.c
i830_drv.h i810/i830: use drm_core_ioremap instead of drm_ioremap 2007-02-08 13:24:26 +11:00
i830_irq.c
i915_dma.c drm: i915: Add ioctl for scheduling buffer swaps at vertical blanks. 2006-12-07 15:53:29 +11:00
i915_drm.h drm: i915: Add SAREA fileds for determining which pipe to sync window buffer swaps to. 2006-12-07 15:53:30 +11:00
i915_drv.c drm: add support for secondary vertical blank interrupt to i915 2006-12-07 15:53:28 +11:00
i915_drv.h drm: i915 updates 2006-12-07 15:53:31 +11:00
i915_ioc32.c [PATCH] struct path: convert drm 2006-12-08 08:28:44 -08:00
i915_irq.c i915: Fix a DRM_ERROR that should be DRM_DEBUG. 2007-01-08 20:38:34 +11:00
i915_mem.c
Kconfig
Makefile [DRM]: Delete sparc64 FFB driver code that never gets built. 2007-03-26 21:49:11 -07:00
mga_dma.c
mga_drm.h
mga_drv.c drm: mga: set dev_priv_size 2006-10-24 21:52:23 +10:00
mga_drv.h
mga_ioc32.c [PATCH] struct path: convert drm 2006-12-08 08:28:44 -08:00
mga_irq.c
mga_state.c
mga_ucode.h
mga_warp.c
r128_cce.c
r128_drm.h drm: r128: comment aligment with drm git 2006-12-19 17:56:14 +11:00
r128_drv.c
r128_drv.h drm: r128: comment aligment with drm git 2006-12-19 17:56:14 +11:00
r128_ioc32.c [PATCH] struct path: convert drm 2006-12-08 08:28:44 -08:00
r128_irq.c
r128_state.c drm: r128: comment aligment with drm git 2006-12-19 17:56:14 +11:00
r300_cmdbuf.c drm: Unify radeon offset checking. 2006-12-15 18:54:35 +11:00
r300_reg.h
radeon_cp.c
radeon_drm.h
radeon_drv.c
radeon_drv.h drm: Unify radeon offset checking. 2006-12-15 18:54:35 +11:00
radeon_ioc32.c [PATCH] struct path: convert drm 2006-12-08 08:28:44 -08:00
radeon_irq.c drm: fixup comment header style 2006-12-19 17:49:08 +11:00
radeon_mem.c drm: fixup comment header style 2006-12-19 17:49:08 +11:00
radeon_state.c drm: Unify radeon offset checking. 2006-12-15 18:54:35 +11:00
README.drm
savage_bci.c drm: savage: compat fix from drm git. 2006-12-19 17:20:02 +11:00
savage_drm.h
savage_drv.c
savage_drv.h
savage_state.c fix return code in error case. 2006-10-25 09:40:40 -07:00
sis_drm.h
sis_drv.c
sis_drv.h
sis_mm.c
tdfx_drv.c
tdfx_drv.h
via_3d_reg.h
via_dma.c drm/via: Disable AGP DMA for chips with the new 3D engine. 2007-02-08 13:24:26 +11:00
via_dmablit.c [PATCH] Char: timers cleanup 2007-02-12 09:48:30 -08:00
via_dmablit.h
via_drm.h
via_drv.c
via_drv.h via: allow for npot texture pitch alignment 2007-02-08 13:24:25 +11:00
via_irq.c via: add some new chipsets 2007-02-08 13:24:25 +11:00
via_map.c via: add some new chipsets 2007-02-08 13:24:25 +11:00
via_mm.c
via_mm.h
via_verifier.c via: allow for npot texture pitch alignment 2007-02-08 13:24:25 +11:00
via_verifier.h via: allow for npot texture pitch alignment 2007-02-08 13:24:25 +11:00
via_video.c

************************************************************
* For the very latest on DRI development, please see:      *
*     http://dri.sourceforge.net/                          *
************************************************************

The Direct Rendering Manager (drm) is a device-independent kernel-level
device driver that provides support for the XFree86 Direct Rendering
Infrastructure (DRI).

The DRM supports the Direct Rendering Infrastructure (DRI) in four major
ways:

    1. The DRM provides synchronized access to the graphics hardware via
       the use of an optimized two-tiered lock.

    2. The DRM enforces the DRI security policy for access to the graphics
       hardware by only allowing authenticated X11 clients access to
       restricted regions of memory.

    3. The DRM provides a generic DMA engine, complete with multiple
       queues and the ability to detect the need for an OpenGL context
       switch.

    4. The DRM is extensible via the use of small device-specific modules
       that rely extensively on the API exported by the DRM module.


Documentation on the DRI is available from:
    http://precisioninsight.com/piinsights.html

For specific information about kernel-level support, see:

    The Direct Rendering Manager, Kernel Support for the Direct Rendering
    Infrastructure
    http://precisioninsight.com/dr/drm.html

    Hardware Locking for the Direct Rendering Infrastructure
    http://precisioninsight.com/dr/locking.html

    A Security Analysis of the Direct Rendering Infrastructure
    http://precisioninsight.com/dr/security.html

************************************************************
* For the very latest on DRI development, please see:      *
*     http://dri.sourceforge.net/                          *
************************************************************