b163363535
commit 2ebc336be08160debfe27f87660cf550d710f3e9 upstream.
Erase can be zeroed in spi_nor_parse_4bait() or
spi_nor_init_non_uniform_erase_map(). In practice it happened with
mt25qu256a, which supports 4K, 32K, 64K erases with 3b address commands,
but only 4K and 64K erase with 4b address commands.
Fixes:
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.. | ||
aspeed-smc.c | ||
cadence-quadspi.c | ||
hisi-sfc.c | ||
intel-spi-pci.c | ||
intel-spi-platform.c | ||
intel-spi.c | ||
intel-spi.h | ||
Kconfig | ||
Makefile | ||
mtk-quadspi.c | ||
nxp-spifi.c | ||
spi-nor.c |