e4fc324197
Video and command mode will be included in same timing node when POMS is enabled, but DFPS is only applicable for video mode, so add this change to differentiate panel mode, and fill display mode according to panel mode. Change-Id: I6aa0f8572f23f0612684ed7cdf406b20ab3df822 Signed-off-by: Lei Chen <chenlei@codeaurora.org>
711 lines
22 KiB
C
711 lines
22 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DSI_DISPLAY_H_
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#define _DSI_DISPLAY_H_
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <linux/debugfs.h>
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#include <linux/of_device.h>
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#include <linux/firmware.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc.h>
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#include "msm_drv.h"
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#include "dsi_defs.h"
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#include "dsi_ctrl.h"
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#include "dsi_phy.h"
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#include "dsi_panel.h"
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#define MAX_DSI_CTRLS_PER_DISPLAY 2
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#define DSI_CLIENT_NAME_SIZE 20
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#define MAX_CMDLINE_PARAM_LEN 512
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#define MAX_CMD_PAYLOAD_SIZE 256
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/*
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* DSI Validate Mode modifiers
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* @DSI_VALIDATE_FLAG_ALLOW_ADJUST: Allow mode validation to also do fixup
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*/
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#define DSI_VALIDATE_FLAG_ALLOW_ADJUST 0x1
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/**
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* enum dsi_display_selection_type - enumerates DSI display selection types
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* @DSI_PRIMARY: primary DSI display selected from module parameter
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* @DSI_SECONDARY: Secondary DSI display selected from module parameter
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* @MAX_DSI_ACTIVE_DISPLAY: Maximum acive displays that can be selected
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*/
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enum dsi_display_selection_type {
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DSI_PRIMARY = 0,
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DSI_SECONDARY,
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MAX_DSI_ACTIVE_DISPLAY,
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};
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/**
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* enum dsi_display_type - enumerates DSI display types
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* @DSI_DISPLAY_SINGLE: A panel connected on a single DSI interface.
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* @DSI_DISPLAY_EXT_BRIDGE: A bridge is connected between panel and DSI host.
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* It utilizes a single DSI interface.
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* @DSI_DISPLAY_SPLIT: A panel that utilizes more than one DSI
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* interfaces.
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* @DSI_DISPLAY_SPLIT_EXT_BRIDGE: A bridge is present between panel and DSI
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* host. It utilizes more than one DSI interface.
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*/
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enum dsi_display_type {
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DSI_DISPLAY_SINGLE = 0,
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DSI_DISPLAY_EXT_BRIDGE,
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DSI_DISPLAY_SPLIT,
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DSI_DISPLAY_SPLIT_EXT_BRIDGE,
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DSI_DISPLAY_MAX,
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};
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/**
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* struct dsi_display_ctrl - dsi ctrl/phy information for the display
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* @ctrl: Handle to the DSI controller device.
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* @ctrl_of_node: pHandle to the DSI controller device.
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* @dsi_ctrl_idx: DSI controller instance id.
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* @power_state: Current power state of the DSI controller.
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* @phy: Handle to the DSI PHY device.
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* @phy_of_node: pHandle to the DSI PHY device.
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* @phy_enabled: PHY power status.
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*/
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struct dsi_display_ctrl {
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/* controller info */
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struct dsi_ctrl *ctrl;
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struct device_node *ctrl_of_node;
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u32 dsi_ctrl_idx;
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enum dsi_power_state power_state;
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/* phy info */
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struct msm_dsi_phy *phy;
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struct device_node *phy_of_node;
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bool phy_enabled;
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};
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/**
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* struct dsi_display_boot_param - defines DSI boot display selection
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* @name:Name of DSI display selected as a boot param.
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* @boot_disp_en:bool to indicate dtsi availability of display node
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* @is_primary:bool to indicate whether current display is primary display
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* @length:length of DSI display.
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* @cmdline_topology: Display topology shared from kernel command line.
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*/
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struct dsi_display_boot_param {
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char name[MAX_CMDLINE_PARAM_LEN];
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char *boot_param;
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bool boot_disp_en;
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int length;
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struct device_node *node;
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int cmdline_topology;
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void *disp;
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};
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/**
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* struct dsi_display_clk_info - dsi display clock source information
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* @src_clks: Source clocks for DSI display.
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* @mux_clks: Mux clocks used for DFPS.
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* @shadow_clks: Used for DFPS.
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*/
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struct dsi_display_clk_info {
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struct dsi_clk_link_set src_clks;
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struct dsi_clk_link_set mux_clks;
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struct dsi_clk_link_set shadow_clks;
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};
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/**
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* struct dsi_display_ext_bridge - dsi display external bridge information
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* @display: Pointer of DSI display.
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* @node_of: Bridge node created from bridge driver.
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* @bridge: Bridge created from bridge driver
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* @orig_funcs: Bridge function from bridge driver (split mode only)
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* @bridge_funcs: Overridden function from bridge driver (split mode only)
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*/
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struct dsi_display_ext_bridge {
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void *display;
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struct device_node *node_of;
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struct drm_bridge *bridge;
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const struct drm_bridge_funcs *orig_funcs;
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struct drm_bridge_funcs bridge_funcs;
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};
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/**
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* struct dsi_display - dsi display information
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* @pdev: Pointer to platform device.
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* @drm_dev: DRM device associated with the display.
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* @drm_conn: Pointer to DRM connector associated with the display
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* @ext_conn: Pointer to external connector attached to DSI connector
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* @name: Name of the display.
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* @display_type: Display type as defined in device tree.
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* @list: List pointer.
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* @is_active: Is display active.
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* @is_cont_splash_enabled: Is continuous splash enabled
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* @sw_te_using_wd: Is software te enabled
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* @display_lock: Mutex for dsi_display interface.
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* @disp_te_gpio: GPIO for panel TE interrupt.
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* @is_te_irq_enabled:bool to specify whether TE interrupt is enabled.
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* @esd_te_gate: completion gate to signal TE interrupt.
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* @ctrl_count: Number of DSI interfaces required by panel.
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* @ctrl: Controller information for DSI display.
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* @panel: Handle to DSI panel.
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* @panel_node: pHandle to DSI panel actually in use.
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* @ext_bridge: External bridge information for DSI display.
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* @ext_bridge_cnt: Number of external bridges
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* @modes: Array of probed DSI modes
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* @type: DSI display type.
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* @clk_master_idx: The master controller for controlling clocks. This is an
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* index into the ctrl[MAX_DSI_CTRLS_PER_DISPLAY] array.
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* @cmd_master_idx: The master controller for sending DSI commands to panel.
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* @video_master_idx: The master controller for enabling video engine.
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* @cached_clk_rate: The cached DSI clock rate set dynamically by sysfs.
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* @clkrate_change_pending: Flag indicating the pending DSI clock re-enabling.
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* @clock_info: Clock sourcing for DSI display.
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* @config: DSI host configuration information.
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* @lane_map: Lane mapping between DSI host and Panel.
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* @cmdline_topology: Display topology shared from kernel command line.
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* @cmdline_timing: Display timing shared from kernel command line.
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* @is_tpg_enabled: TPG state.
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* @poms_pending; Flag indicating the pending panel operating mode switch.
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* @ulps_enabled: ulps state.
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* @clamp_enabled: clamp state.
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* @phy_idle_power_off: PHY power state.
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* @host: DRM MIPI DSI Host.
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* @bridge: Pointer to DRM bridge object.
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* @cmd_engine_refcount: Reference count enforcing single instance of cmd eng
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* @clk_mngr: DSI clock manager.
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* @dsi_clk_handle: DSI clock handle.
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* @mdp_clk_handle: MDP clock handle.
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* @root: Debugfs root directory
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* @misr_enable Frame MISR enable/disable
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* @misr_frame_count Number of frames to accumulate the MISR value
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* @esd_trigger field indicating ESD trigger through debugfs
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* @te_source vsync source pin information
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* @clk_gating_config Clocks for which clock gating needs to be enabled
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*/
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struct dsi_display {
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struct platform_device *pdev;
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struct drm_device *drm_dev;
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struct drm_connector *drm_conn;
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struct drm_connector *ext_conn;
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const char *name;
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const char *display_type;
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struct list_head list;
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bool is_cont_splash_enabled;
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bool sw_te_using_wd;
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struct mutex display_lock;
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int disp_te_gpio;
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bool is_te_irq_enabled;
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struct completion esd_te_gate;
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u32 ctrl_count;
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struct dsi_display_ctrl ctrl[MAX_DSI_CTRLS_PER_DISPLAY];
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/* panel info */
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struct dsi_panel *panel;
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struct device_node *panel_node;
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struct device_node *parser_node;
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/* external bridge */
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struct dsi_display_ext_bridge ext_bridge[MAX_DSI_CTRLS_PER_DISPLAY];
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u32 ext_bridge_cnt;
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struct dsi_display_mode *modes;
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enum dsi_display_type type;
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u32 clk_master_idx;
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u32 cmd_master_idx;
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u32 video_master_idx;
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/* dynamic DSI clock info*/
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u32 cached_clk_rate;
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atomic_t clkrate_change_pending;
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struct dsi_display_clk_info clock_info;
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struct dsi_host_config config;
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struct dsi_lane_map lane_map;
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int cmdline_topology;
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int cmdline_timing;
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bool is_tpg_enabled;
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bool poms_pending;
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bool ulps_enabled;
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bool clamp_enabled;
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bool phy_idle_power_off;
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struct drm_gem_object *tx_cmd_buf;
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u32 cmd_buffer_size;
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u64 cmd_buffer_iova;
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void *vaddr;
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struct msm_gem_address_space *aspace;
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struct mipi_dsi_host host;
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struct dsi_bridge *bridge;
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u32 cmd_engine_refcount;
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void *clk_mngr;
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void *dsi_clk_handle;
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void *mdp_clk_handle;
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/* DEBUG FS */
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struct dentry *root;
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bool misr_enable;
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u32 misr_frame_count;
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u32 esd_trigger;
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/* multiple dsi error handlers */
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struct workqueue_struct *err_workq;
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struct work_struct fifo_underflow_work;
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struct work_struct fifo_overflow_work;
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struct work_struct lp_rx_timeout_work;
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/* firmware panel data */
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const struct firmware *fw;
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void *parser;
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struct dsi_display_boot_param *boot_disp;
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u32 te_source;
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u32 clk_gating_config;
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};
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int dsi_display_dev_probe(struct platform_device *pdev);
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int dsi_display_dev_remove(struct platform_device *pdev);
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/**
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* dsi_display_get_num_of_displays() - returns number of display devices
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* supported.
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*
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* Return: number of displays.
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*/
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int dsi_display_get_num_of_displays(void);
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/**
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* dsi_display_get_active_displays - returns pointers for active display devices
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* @display_array: Pointer to display array to be filled
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* @max_display_count: Size of display_array
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* @Returns: Number of display entries filled
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*/
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int dsi_display_get_active_displays(void **display_array,
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u32 max_display_count);
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/**
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* dsi_display_get_display_by_name()- finds display by name
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* @name: name of the display.
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*
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* Return: handle to the display or error code.
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*/
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struct dsi_display *dsi_display_get_display_by_name(const char *name);
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/**
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* dsi_display_set_active_state() - sets the state of the display
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* @display: Handle to display.
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* @is_active: state
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*/
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void dsi_display_set_active_state(struct dsi_display *display, bool is_active);
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/**
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* dsi_display_drm_bridge_init() - initializes DRM bridge object for DSI
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* @display: Handle to the display.
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* @encoder: Pointer to the encoder object which is connected to the
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* display.
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*
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* Return: error code.
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*/
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int dsi_display_drm_bridge_init(struct dsi_display *display,
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struct drm_encoder *enc);
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/**
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* dsi_display_drm_bridge_deinit() - destroys DRM bridge for the display
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* @display: Handle to the display.
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*
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* Return: error code.
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*/
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int dsi_display_drm_bridge_deinit(struct dsi_display *display);
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/**
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* dsi_display_drm_ext_bridge_init() - initializes DRM bridge for ext bridge
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* @display: Handle to the display.
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* @enc: Pointer to the encoder object which is connected to the
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* display.
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* @connector: Pointer to the connector object which is connected to
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* the display.
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*
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* Return: error code.
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*/
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int dsi_display_drm_ext_bridge_init(struct dsi_display *display,
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struct drm_encoder *enc, struct drm_connector *connector);
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/**
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* dsi_display_get_info() - returns the display properties
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* @connector: Pointer to drm connector structure
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* @info: Pointer to the structure where info is stored.
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* @disp: Handle to the display.
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*
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* Return: error code.
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*/
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int dsi_display_get_info(struct drm_connector *connector,
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struct msm_display_info *info, void *disp);
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/**
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* dsi_display_get_mode_count() - get number of modes supported by the display
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* @display: Handle to display.
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* @count: Number of modes supported
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*
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* Return: error code.
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*/
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int dsi_display_get_mode_count(struct dsi_display *display, u32 *count);
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/**
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* dsi_display_get_modes() - get modes supported by display
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* @display: Handle to display.
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* @modes; Output param, list of DSI modes. Number of modes matches
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* count got from display->panel->num_display_modes;
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*
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* Return: error code.
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*/
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int dsi_display_get_modes(struct dsi_display *display,
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struct dsi_display_mode **modes);
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/**
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* dsi_display_put_mode() - free up mode created for the display
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* @display: Handle to display.
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* @mode: Display mode to be freed up
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*
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* Return: error code.
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*/
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void dsi_display_put_mode(struct dsi_display *display,
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struct dsi_display_mode *mode);
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/**
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* dsi_display_get_default_lms() - retrieve max number of lms used
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* for dsi display by traversing through all topologies
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* @display: Handle to display.
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* @num_lm: Number of LMs used
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*
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* Return: error code.
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*/
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int dsi_display_get_default_lms(void *dsi_display, u32 *num_lm);
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/**
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* dsi_display_find_mode() - retrieve cached DSI mode given relevant params
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* @display: Handle to display.
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* @cmp: Mode to use as comparison to find original
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* @out_mode: Output parameter, pointer to retrieved mode
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*
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* Return: error code.
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*/
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int dsi_display_find_mode(struct dsi_display *display,
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const struct dsi_display_mode *cmp,
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struct dsi_display_mode **out_mode);
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/**
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* dsi_display_validate_mode() - validates if mode is supported by display
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* @display: Handle to display.
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* @mode: Mode to be validated.
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* @flags: Modifier flags.
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*
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* Return: 0 if supported or error code.
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*/
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int dsi_display_validate_mode(struct dsi_display *display,
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struct dsi_display_mode *mode,
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u32 flags);
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/**
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* dsi_display_validate_mode_change() - validates mode if variable refresh case
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* or dynamic clk change case
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* @display: Handle to display.
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* @mode: Mode to be validated..
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*
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* Return: 0 if error code.
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*/
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int dsi_display_validate_mode_change(struct dsi_display *display,
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struct dsi_display_mode *cur_dsi_mode,
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struct dsi_display_mode *mode);
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/**
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* dsi_display_set_mode() - Set mode on the display.
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* @display: Handle to display.
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* @mode: mode to be set.
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* @flags: Modifier flags.
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*
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* Return: error code.
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*/
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int dsi_display_set_mode(struct dsi_display *display,
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struct dsi_display_mode *mode,
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u32 flags);
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/**
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* dsi_display_prepare() - prepare display
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* @display: Handle to display.
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*
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* Prepare will perform power up sequences for the host and panel hardware.
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* Power and clock resources might be turned on (depending on the panel mode).
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* The video engine is not enabled.
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*
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* Return: error code.
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*/
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int dsi_display_prepare(struct dsi_display *display);
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/**
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* dsi_display_splash_res_cleanup() - cleanup for continuous splash
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* @display: Pointer to dsi display
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* Returns: Zero on success
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*/
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int dsi_display_splash_res_cleanup(struct dsi_display *display);
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/**
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* dsi_display_config_ctrl_for_cont_splash()- Enable engine modes for DSI
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* controller during continuous splash
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* @display: Handle to DSI display
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*
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* Return: returns error code
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*/
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int dsi_display_config_ctrl_for_cont_splash(struct dsi_display *display);
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/**
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* dsi_display_enable() - enable display
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* @display: Handle to display.
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*
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* Enable will turn on the host engine and the panel. At the end of the enable
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* function, Host and panel hardware are ready to accept pixel data from
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* upstream.
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*
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* Return: error code.
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*/
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int dsi_display_enable(struct dsi_display *display);
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/**
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* dsi_display_post_enable() - perform post enable operations.
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* @display: Handle to display.
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*
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* Some panels might require some commands to be sent after pixel data
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* transmission has started. Such commands are sent as part of the post_enable
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* function.
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*
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* Return: error code.
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*/
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int dsi_display_post_enable(struct dsi_display *display);
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/**
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* dsi_display_pre_disable() - perform pre disable operations.
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* @display: Handle to display.
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*
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|
* If a panel requires commands to be sent before pixel data transmission is
|
|
* stopped, those can be sent as part of pre_disable.
|
|
*
|
|
* Return: error code.
|
|
*/
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|
int dsi_display_pre_disable(struct dsi_display *display);
|
|
|
|
/**
|
|
* dsi_display_disable() - disable panel and host hardware.
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* @display: Handle to display.
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|
*
|
|
* Disable host and panel hardware and pixel data transmission can not continue.
|
|
*
|
|
* Return: error code.
|
|
*/
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int dsi_display_disable(struct dsi_display *display);
|
|
|
|
/**
|
|
* dsi_pre_clkoff_cb() - Callback before clock is turned off
|
|
* @priv: private data pointer.
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|
* @clk_type: clock which is being turned on.
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|
* @l_type: specifies if the clock is HS or LP type. Valid only for link clocks.
|
|
* @new_state: next state for the clock.
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|
*
|
|
* @return: error code.
|
|
*/
|
|
int dsi_pre_clkoff_cb(void *priv, enum dsi_clk_type clk_type,
|
|
enum dsi_lclk_type l_type,
|
|
enum dsi_clk_state new_state);
|
|
|
|
/**
|
|
* dsi_display_update_pps() - update PPS buffer.
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|
* @pps_cmd: PPS buffer.
|
|
* @display: Handle to display.
|
|
*
|
|
* Copies new PPS buffer into display structure.
|
|
*
|
|
* Return: error code.
|
|
*/
|
|
int dsi_display_update_pps(char *pps_cmd, void *display);
|
|
|
|
/**
|
|
* dsi_post_clkoff_cb() - Callback after clock is turned off
|
|
* @priv: private data pointer.
|
|
* @clk_type: clock which is being turned on.
|
|
* @l_type: specifies if the clock is HS or LP type. Valid only for link clocks.
|
|
* @curr_state: current state for the clock.
|
|
*
|
|
* @return: error code.
|
|
*/
|
|
int dsi_post_clkoff_cb(void *priv, enum dsi_clk_type clk_type,
|
|
enum dsi_lclk_type l_type,
|
|
enum dsi_clk_state curr_state);
|
|
|
|
/**
|
|
* dsi_post_clkon_cb() - Callback after clock is turned on
|
|
* @priv: private data pointer.
|
|
* @clk_type: clock which is being turned on.
|
|
* @l_type: specifies if the clock is HS or LP type. Valid only for link clocks.
|
|
* @curr_state: current state for the clock.
|
|
*
|
|
* @return: error code.
|
|
*/
|
|
int dsi_post_clkon_cb(void *priv, enum dsi_clk_type clk_type,
|
|
enum dsi_lclk_type l_type,
|
|
enum dsi_clk_state curr_state);
|
|
|
|
/**
|
|
* dsi_pre_clkon_cb() - Callback before clock is turned on
|
|
* @priv: private data pointer.
|
|
* @clk_type: clock which is being turned on.
|
|
* @l_type: specifies if the clock is HS or LP type. Valid only for link clocks.
|
|
* @new_state: next state for the clock.
|
|
*
|
|
* @return: error code.
|
|
*/
|
|
int dsi_pre_clkon_cb(void *priv, enum dsi_clk_type clk_type,
|
|
enum dsi_lclk_type l_type,
|
|
enum dsi_clk_state new_state);
|
|
|
|
/**
|
|
* dsi_display_unprepare() - power off display hardware.
|
|
* @display: Handle to display.
|
|
*
|
|
* Host and panel hardware is turned off. Panel will be in reset state at the
|
|
* end of the function.
|
|
*
|
|
* Return: error code.
|
|
*/
|
|
int dsi_display_unprepare(struct dsi_display *display);
|
|
|
|
int dsi_display_set_tpg_state(struct dsi_display *display, bool enable);
|
|
|
|
int dsi_display_clock_gate(struct dsi_display *display, bool enable);
|
|
int dsi_dispaly_static_frame(struct dsi_display *display, bool enable);
|
|
|
|
/**
|
|
* dsi_display_get_drm_panel() - get drm_panel from display.
|
|
* @display: Handle to display.
|
|
* Get drm_panel which was inclued in dsi_display's dsi_panel.
|
|
*
|
|
* Return: drm_panel/NULL.
|
|
*/
|
|
struct drm_panel *dsi_display_get_drm_panel(struct dsi_display *display);
|
|
|
|
/**
|
|
* dsi_display_enable_event() - enable interrupt based connector event
|
|
* @connector: Pointer to drm connector structure
|
|
* @display: Handle to display.
|
|
* @event_idx: Event index.
|
|
* @event_info: Event callback definition.
|
|
* @enable: Whether to enable/disable the event interrupt.
|
|
*/
|
|
void dsi_display_enable_event(struct drm_connector *connector,
|
|
struct dsi_display *display,
|
|
uint32_t event_idx, struct dsi_event_cb_info *event_info,
|
|
bool enable);
|
|
|
|
/**
|
|
* dsi_display_set_backlight() - set backlight
|
|
* @connector: Pointer to drm connector structure
|
|
* @display: Handle to display.
|
|
* @bl_lvl: Backlight level.
|
|
* @event_info: Event callback definition.
|
|
* @enable: Whether to enable/disable the event interrupt.
|
|
*/
|
|
int dsi_display_set_backlight(struct drm_connector *connector,
|
|
void *display, u32 bl_lvl);
|
|
|
|
/**
|
|
* dsi_display_check_status() - check if panel is dead or alive
|
|
* @connector: Pointer to drm connector structure
|
|
* @display: Handle to display.
|
|
* @te_check_override: Whether check for TE from panel or default check
|
|
*/
|
|
int dsi_display_check_status(struct drm_connector *connector, void *display,
|
|
bool te_check_override);
|
|
|
|
/**
|
|
* dsi_display_cmd_transfer() - transfer command to the panel
|
|
* @connector: Pointer to drm connector structure
|
|
* @display: Handle to display.
|
|
* @cmd_buf: Command buffer
|
|
* @cmd_buf_len: Command buffer length in bytes
|
|
*/
|
|
int dsi_display_cmd_transfer(struct drm_connector *connector,
|
|
void *display, const char *cmd_buffer,
|
|
u32 cmd_buf_len);
|
|
|
|
/**
|
|
* dsi_display_soft_reset() - perform a soft reset on DSI controller
|
|
* @display: Handle to display
|
|
*
|
|
* The video, command and controller engines will be disabled before the
|
|
* reset is triggered. After, the engines will be re-enabled to the same state
|
|
* as before the reset.
|
|
*
|
|
* If the reset is done while MDP timing engine is turned on, the video
|
|
* engine should be re-enabled only during the vertical blanking time.
|
|
*
|
|
* Return: error code
|
|
*/
|
|
int dsi_display_soft_reset(void *display);
|
|
|
|
/**
|
|
* dsi_display_set_power - update power/dpms setting
|
|
* @connector: Pointer to drm connector structure
|
|
* @power_mode: One of the following,
|
|
* SDE_MODE_DPMS_ON
|
|
* SDE_MODE_DPMS_LP1
|
|
* SDE_MODE_DPMS_LP2
|
|
* SDE_MODE_DPMS_STANDBY
|
|
* SDE_MODE_DPMS_SUSPEND
|
|
* SDE_MODE_DPMS_OFF
|
|
* @display: Pointer to private display structure
|
|
* Returns: Zero on success
|
|
*/
|
|
int dsi_display_set_power(struct drm_connector *connector,
|
|
int power_mode, void *display);
|
|
|
|
/*
|
|
* dsi_display_pre_kickoff - program kickoff-time features
|
|
* @connector: Pointer to drm connector structure
|
|
* @display: Pointer to private display structure
|
|
* @params: Parameters for kickoff-time programming
|
|
* Returns: Zero on success
|
|
*/
|
|
int dsi_display_pre_kickoff(struct drm_connector *connector,
|
|
struct dsi_display *display,
|
|
struct msm_display_kickoff_params *params);
|
|
/**
|
|
* dsi_display_get_dst_format() - get dst_format from DSI display
|
|
* @connector: Pointer to drm connector structure
|
|
* @display: Handle to display
|
|
*
|
|
* Return: enum dsi_pixel_format type
|
|
*/
|
|
enum dsi_pixel_format dsi_display_get_dst_format(
|
|
struct drm_connector *connector,
|
|
void *display);
|
|
|
|
/**
|
|
* dsi_display_cont_splash_config() - initialize splash resources
|
|
* @display: Handle to display
|
|
*
|
|
* Return: Zero on Success
|
|
*/
|
|
int dsi_display_cont_splash_config(void *display);
|
|
/*
|
|
* dsi_display_get_panel_vfp - get panel vsync
|
|
* @display: Pointer to private display structure
|
|
* @h_active: width
|
|
* @v_active: height
|
|
* Returns: v_front_porch on success error code on failure
|
|
*/
|
|
int dsi_display_get_panel_vfp(void *display,
|
|
int h_active, int v_active);
|
|
|
|
#endif /* _DSI_DISPLAY_H_ */
|