4e6d488af3
Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
39 lines
1.0 KiB
ArmAsm
39 lines
1.0 KiB
ArmAsm
/*
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* arch/arm/mach-ks8695/include/mach/debug-macro.S
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*
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* Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
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* Copyright (C) 2006 Simtec Electronics
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*
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* KS8695 - Debug macros
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <mach/hardware.h>
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#include <mach/regs-uart.h>
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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ldreq \rx, =KS8695_UART_PA @ physical base address
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ldrne \rx, =KS8695_UART_VA @ virtual base address
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.endm
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.macro senduart, rd, rx
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str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register
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.endm
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.macro busyuart, rd, rx
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1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
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tst \rd, #URLS_URTE @ Holding & Shift registers empty?
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beq 1001b
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.endm
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.macro waituart, rd, rx
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1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
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tst \rd, #URLS_URTHRE @ Holding Register empty?
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beq 1001b
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.endm
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