android_kernel_xiaomi_sm8350/arch/ppc64/mm
David Gibson e28f7faf05 [PATCH] Four level pagetables for ppc64
Implement 4-level pagetables for ppc64

This patch implements full four-level page tables for ppc64, thereby
extending the usable user address range to 44 bits (16T).

The patch uses a full page for the tables at the bottom and top level,
and a quarter page for the intermediate levels.  It uses full 64-bit
pointers at every level, thus also increasing the addressable range of
physical memory.  This patch also tweaks the VSID allocation to allow
matching range for user addresses (this halves the number of available
contexts) and adds some #if and BUILD_BUG sanity checks.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-08-29 10:53:31 +10:00
..
fault.c
hash_low.S [PATCH] ppc64: kill bitfields in ppc64 hash code 2005-07-13 11:25:25 -07:00
hash_native.c [PATCH] ppc64: kill bitfields in ppc64 hash code 2005-07-13 11:25:25 -07:00
hash_utils.c [PATCH] Four level pagetables for ppc64 2005-08-29 10:53:31 +10:00
hugetlbpage.c [PATCH] Four level pagetables for ppc64 2005-08-29 10:53:31 +10:00
imalloc.c [PATCH] Four level pagetables for ppc64 2005-08-29 10:53:31 +10:00
init.c [PATCH] Four level pagetables for ppc64 2005-08-29 10:53:31 +10:00
Makefile [PATCH] ppc64: sparsemem memory model 2005-06-23 09:45:06 -07:00
mmap.c
numa.c [PATCH] ppc64: POWER 4 fails to boot with NUMA 2005-08-01 21:38:01 -07:00
slb_low.S [PATCH] Four level pagetables for ppc64 2005-08-29 10:53:31 +10:00
slb.c
stab.c [PATCH] ppc64: dynamically allocate segment tables 2005-07-27 16:25:58 -07:00
tlb.c [PATCH] Four level pagetables for ppc64 2005-08-29 10:53:31 +10:00