1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
84 lines
2.5 KiB
C
84 lines
2.5 KiB
C
/*
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* arch/ppc/platforms/4xx/ash.h
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*
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* Macros, definitions, and data structures specific to the IBM PowerPC
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* Ash eval board.
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*
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* Author: Armin Kuster <akuster@mvista.com>
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*
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* 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_ASH_H__
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#define __ASM_ASH_H__
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#include <platforms/4xx/ibmnp405h.h>
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#ifndef __ASSEMBLY__
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/*
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* Data structure defining board information maintained by the boot
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* ROM on IBM's "Ash" evaluation board. An effort has been made to
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* keep the field names consistent with the 8xx 'bd_t' board info
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* structures.
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*/
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typedef struct board_info {
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unsigned char bi_s_version[4]; /* Version of this structure */
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unsigned char bi_r_version[30]; /* Version of the IBM ROM */
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unsigned int bi_memsize; /* DRAM installed, in bytes */
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unsigned char bi_enetaddr[4][6]; /* Local Ethernet MAC address */
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unsigned char bi_pci_enetaddr[6];
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unsigned int bi_intfreq; /* Processor speed, in Hz */
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unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI speed in Hz */
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} bd_t;
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/* Some 4xx parts use a different timebase frequency from the internal clock.
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*/
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#define bi_tbfreq bi_intfreq
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/* Memory map for the IBM "Ash" NP405H evaluation board.
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*/
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extern void *ash_rtc_base;
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#define ASH_RTC_PADDR ((uint)0xf0000000)
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#define ASH_RTC_VADDR ASH_RTC_PADDR
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#define ASH_RTC_SIZE ((uint)8*1024)
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/* Early initialization address mapping for block_io.
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* Standard 405GP map.
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*/
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#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE)
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#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR
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#define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
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#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR)
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#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR
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#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
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#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000)
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#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR
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#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
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#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000)
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#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR
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#define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
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#define NR_BOARD_IRQS 32
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#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK
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#define BASE_BAUD 201600
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#else
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#define BASE_BAUD 691200
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#endif
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#define PPC4xx_MACHINE_NAME "IBM NP405H Ash"
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extern char pci_irq_table[][4];
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#endif /* !__ASSEMBLY__ */
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#endif /* __ASM_ASH_H__ */
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#endif /* __KERNEL__ */
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