35f3c5185b
Trivial fixes for build breakage introduced by IRQ handler changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
196 lines
4.6 KiB
C
196 lines
4.6 KiB
C
/*
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* $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
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*
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* Setup and IRQ handling code for the HD64465 companion chip.
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* by Greg Banks <gbanks@pocketpenguins.com>
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* Copyright (c) 2000 PocketPenguins Inc
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*
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* Derived from setup_hd64461.c which bore the message:
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* Copyright (C) 2000 YAEGASHI Takeshi
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*/
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hd64465/hd64465.h>
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static void disable_hd64465_irq(unsigned int irq)
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{
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unsigned short nimr;
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unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
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pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
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nimr = inw(HD64465_REG_NIMR);
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nimr |= mask;
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outw(nimr, HD64465_REG_NIMR);
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}
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static void enable_hd64465_irq(unsigned int irq)
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{
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unsigned short nimr;
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unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
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pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
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nimr = inw(HD64465_REG_NIMR);
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nimr &= ~mask;
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outw(nimr, HD64465_REG_NIMR);
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}
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static void mask_and_ack_hd64465(unsigned int irq)
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{
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disable_hd64465_irq(irq);
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}
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static void end_hd64465_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_hd64465_irq(irq);
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}
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static unsigned int startup_hd64465_irq(unsigned int irq)
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{
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enable_hd64465_irq(irq);
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return 0;
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}
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static void shutdown_hd64465_irq(unsigned int irq)
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{
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disable_hd64465_irq(irq);
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}
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static struct hw_interrupt_type hd64465_irq_type = {
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.typename = "HD64465-IRQ",
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.startup = startup_hd64465_irq,
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.shutdown = shutdown_hd64465_irq,
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.enable = enable_hd64465_irq,
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.disable = disable_hd64465_irq,
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.ack = mask_and_ack_hd64465,
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.end = end_hd64465_irq,
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};
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static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
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{
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printk(KERN_INFO
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"HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
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inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
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return IRQ_NONE;
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}
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/*====================================================*/
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/*
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* Support for a secondary IRQ demux step. This is necessary
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* because the HD64465 presents a very thin interface to the
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* PCMCIA bus; a lot of features (such as remapping interrupts)
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* normally done in hardware by other PCMCIA host bridges is
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* instead done in software.
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*/
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static struct
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{
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int (*func)(int, void *);
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void *dev;
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} hd64465_demux[HD64465_IRQ_NUM];
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void hd64465_register_irq_demux(int irq,
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int (*demux)(int irq, void *dev), void *dev)
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{
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hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
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hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
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}
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EXPORT_SYMBOL(hd64465_register_irq_demux);
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void hd64465_unregister_irq_demux(int irq)
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{
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hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
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}
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EXPORT_SYMBOL(hd64465_unregister_irq_demux);
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int hd64465_irq_demux(int irq)
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{
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if (irq == CONFIG_HD64465_IRQ) {
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unsigned short i, bit;
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unsigned short nirr = inw(HD64465_REG_NIRR);
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unsigned short nimr = inw(HD64465_REG_NIMR);
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pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
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nirr &= ~nimr;
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for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
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if (nirr & bit)
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break;
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if (i < HD64465_IRQ_NUM) {
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irq = HD64465_IRQ_BASE + i;
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if (hd64465_demux[i].func != 0)
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irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
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}
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}
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return irq;
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}
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static struct irqaction irq0 = { hd64465_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64465", NULL, NULL};
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static int __init setup_hd64465(void)
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{
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int i;
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unsigned short rev;
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unsigned short smscr;
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if (!MACH_HD64465)
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return 0;
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printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
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CONFIG_HD64465_IOBASE,
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CONFIG_HD64465_IRQ,
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HD64465_IRQ_BASE,
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HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
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if (inw(HD64465_REG_SDID) != HD64465_SDID) {
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printk(KERN_ERR "HD64465 device ID not found, check base address\n");
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}
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rev = inw(HD64465_REG_SRR);
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printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
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outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */
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for (i = 0; i < HD64465_IRQ_NUM ; i++) {
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irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
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}
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setup_irq(CONFIG_HD64465_IRQ, &irq0);
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#ifdef CONFIG_SERIAL
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/* wake up the UART from STANDBY at this point */
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smscr = inw(HD64465_REG_SMSCR);
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outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
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/* remap IO ports for first ISA serial port to HD64465 UART */
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hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
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#endif
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return 0;
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}
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module_init(setup_hd64465);
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