Some chips have hardware that can count misses for LLCC at a per-CPU level. This PMU serves as an intermediary that allows us to retrieve these values for use in other drivers. Change-Id: I1dc3090a64ec7d5b12a36b0395c42930128287fe Signed-off-by: Jonathan Avila <avilaj@codeaurora.org> [avajid@codeaurora.org: removed BEAC registers, unused variables and made minor styling changes] Signed-off-by: Amir Vajid <avajid@codeaurora.org> |
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hisilicon | ||
arm_dsu_pmu.c | ||
arm_pmu_acpi.c | ||
arm_pmu_platform.c | ||
arm_pmu.c | ||
arm_smmuv3_pmu.c | ||
arm_spe_pmu.c | ||
arm-cci.c | ||
arm-ccn.c | ||
fsl_imx8_ddr_perf.c | ||
Kconfig | ||
Makefile | ||
qcom_l2_pmu.c | ||
qcom_l3_pmu.c | ||
qcom_llcc_pmu.c | ||
thunderx2_pmu.c | ||
xgene_pmu.c |