e4d06e3953
Add arch/arm/mach-s3c2443 for support of the Samsung S3C2443 SoC This patch adds the core CPU support, clock framework, times and initial IRQ support, as well as adding the directory into the build tree. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
131 lines
3.1 KiB
C
131 lines
3.1 KiB
C
/* linux/arch/arm/mach-s3c2443/irq.c
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*
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* Copyright (c) 2007 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/ptrace.h>
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#include <linux/sysdev.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/mach/irq.h>
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#include <asm/arch/regs-irq.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/plat-s3c24xx/cpu.h>
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#include <asm/plat-s3c24xx/pm.h>
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#include <asm/plat-s3c24xx/irq.h>
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/* WDT/AC97 */
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static void s3c_irq_demux_wdtac97(unsigned int irq,
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struct irq_desc *desc)
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{
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unsigned int subsrc, submsk;
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struct irq_desc *mydesc;
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/* read the current pending interrupts, and the mask
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* for what it is available */
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subsrc = __raw_readl(S3C2410_SUBSRCPND);
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submsk = __raw_readl(S3C2410_INTSUBMSK);
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subsrc &= ~submsk;
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subsrc >>= 27;
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subsrc &= 3;
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if (subsrc != 0) {
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if (subsrc & 1) {
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mydesc = irq_desc + IRQ_S3C2443_WDT;
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desc_handle_irq(IRQ_S3C2443_WDT, mydesc);
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}
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if (subsrc & 2) {
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mydesc = irq_desc + IRQ_S3C2443_AC97;
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desc_handle_irq(IRQ_S3C2443_AC97, mydesc);
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}
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}
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}
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#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
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static void
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s3c_irq_wdtac97_mask(unsigned int irqno)
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{
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s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<27);
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}
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static void
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s3c_irq_wdtac97_unmask(unsigned int irqno)
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{
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s3c_irqsub_unmask(irqno, INTMSK_WDT);
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}
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static void
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s3c_irq_wdtac97_ack(unsigned int irqno)
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{
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s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<27);
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}
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static struct irq_chip s3c_irq_wdtac97 = {
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.mask = s3c_irq_wdtac97_mask,
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.unmask = s3c_irq_wdtac97_unmask,
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.ack = s3c_irq_wdtac97_ack,
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};
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static int s3c2443_irq_add(struct sys_device *sysdev)
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{
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unsigned int irqno;
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printk("S3C2443: IRQ Support\n");
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/* add new chained handler for wdt, ac7 */
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set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
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set_irq_handler(IRQ_WDT, handle_level_irq);
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set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
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for (irqno = IRQ_S3C2443_WDT; irqno <= IRQ_S3C2443_AC97; irqno++) {
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set_irq_chip(irqno, &s3c_irq_wdtac97);
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set_irq_handler(irqno, handle_level_irq);
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set_irq_flags(irqno, IRQF_VALID);
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}
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return 0;
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}
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static struct sysdev_driver s3c2443_irq_driver = {
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.add = s3c2443_irq_add,
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};
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static int s3c2443_irq_init(void)
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{
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return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_irq_driver);
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}
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arch_initcall(s3c2443_irq_init);
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